Memory Apparatus Stacked Circuit Layout Signal Integrity
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Solution Overview
Problem
In memory apparatuses, the increasing area occupied by internal circuits below the memory cell array limits storage capacity and complicates probe testing due to signal distortion and increased R-C loads from longer signal transmission paths.
Innovation Solution
The memory apparatus includes a signal conversion circuit, selection circuit, and buffer to convert control signals into selection signals, select output signals, and buffer outputs to maintain signal integrity, reducing signal distortion and R-C loads by positioning these circuits in the transistor layer below the memory cell array.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If internal circuits are disposed below the memory cell array to ensure area, then storage capacity is improved, but signal transmission path length increases causing signal distortion and increased R-C loads
Solution Approach 1:
The patent transitions from a planar layout to a three-dimensional stacked architecture where the memory cell array is positioned above the transistor layer containing internal circuits. This vertical arrangement maintains large memory cell array area while shortening horizontal signal transmission paths, thereby preserving signal integrity despite increased storage capacity.
Solution Approach 2:
The patent introduces pad structures as intermediary elements positioned between the memory cell array and the internal circuits below. These pads serve as signal routing intermediaries that minimize transmission path length and reduce parasitic effects, enabling reliable signal transmission across the stacked architecture.
2Area of moving object
If internal circuits are disposed below the memory cell array, then storage capacity is improved, but probe testing complexity increases due to signal distortion
Solution Approach 1:
The pad structures act as accessible intermediaries on the chip surface that provide direct probe test access points. By routing signals through these surface-level pads rather than requiring direct access to buried internal circuits, the patent simplifies probe testing while maintaining the benefits of the stacked architecture for increased storage capacity.
Solution Approach 2:
The stacked configuration brings signal interaction points (pads) to the surface dimension accessible by probes, while keeping computation and storage circuits in lower dimensions. This separation of access points from processing elements reduces probe testing complexity despite the increased storage capacity achieved through vertical stacking.
3Reliability
If signal transmission path length is reduced, then signal integrity is improved, but circuit layout complexity increases
Solution Approach 1:
The patent segments the circuit architecture into distinct functional layers: the memory cell array layer above and the transistor layer below, with pads positioned at the surface. This segmentation creates short, dedicated signal paths within each layer while using pads as controlled interface points, improving signal integrity without requiring complex inter-layer routing throughout the entire circuit.
Solution Approach 2:
By organizing circuits in a vertical stack with pads accessible at the surface, the patent creates simple two-dimensional signal paths within each layer rather than complex three-dimensional routing. This dimensional organization maintains short transmission paths for signal integrity while keeping individual layer layouts relatively simple and manageable.
Data Source
AI summary
A memory apparatus includes an internal circuit configured to output a plurality of output signals, a signal conversion circuit configured to convert a control signal to generate a selection signal, and a selection circuit configured to output one of the plurality of output signals based on the selection signal. The memory apparatus also includes a buffer configured to buffer output of the selection circuit and output the buffered output to a pad.