Nonvolatile Memory Stacks With Intermediate Switching Transistors
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Solution Overview
Problem
As nonvolatile memory devices with increased integration and memory capacity experience higher disturbance on memory cells during programming operations, leading to program voltage and pass voltage disturbances, which affect performance and lifetime.
Innovation Solution
Implementing a method that includes a nonvolatile memory device with a memory block comprising stacks of cell strings and intermediate switching transistors, where a double boosting operation is performed by controlling the switching of these transistors to manage channel voltages, reducing disturbances during programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the integration degree and memory capacity of nonvolatile memory devices are increased, then the storage capacity is improved, but disturbance on memory cells during programming operations increases
Solution Approach 1:
The memory block is divided into multiple stacks arranged in the vertical direction, with intermediate switching transistors placed at boundary portions between adjacent stacks. This segmentation allows independent voltage control for each stack, enabling selective programming while isolating disturbance to only the targeted stack rather than affecting the entire memory block.
Solution Approach 2:
Intermediate switching transistors are introduced as intermediary elements at the boundary portions between stacks. These transistors act as mediators that control electrical connection between adjacent stacks, allowing precise control over voltage distribution and current flow during programming operations, thereby minimizing unwanted disturbance to non-programmed memory cells.
2Speed
If conventional programming operations are performed on high-capacity memory devices, then programming speed is maintained, but program voltage disturbance and pass voltage disturbance increase
Solution Approach 1:
The intermediate switching transistors dynamically adjust their conduction state during programming operations based on the selected memory cells and stacks. By controlling the switching transistors to be in conduction or non-conduction states at different times, the system adaptively manages voltage distribution to minimize disturbance while maintaining efficient programming speed.
Solution Approach 2:
The invention changes the voltage parameters applied to different stacks by controlling the intermediate switching transistors. During programming, specific stacks receive appropriate pass voltages while others are isolated, effectively managing voltage disturbance levels without compromising programming speed through the dynamic adjustment of electrical connection states.
Data Source
AI summary
In a method of programming in a nonvolatile memory device, a memory block including a plurality of stacks disposed in a vertical direction is provided where the memory block includes cell strings each of which includes memory cells connected in series in the vertical direction between a source line and each of bitlines. A plurality of intermediate switching transistors disposed in a boundary portion between two adjacent stacks in the vertical direction is provided, where the intermediate switching transistors perform a switching operation to control electrical connection of the cell strings, respectively. A boosting operation is performed to boost voltages of channels of the plurality of stacks while controlling the switching operation of the intermediate switching transistors during a program operation with respect to the memory block. Program voltage disturbance and pass voltage disturbance are reduced through control of the switching operation of the intermediate switching transistors.