3D Memory Staircase Contacts With Split Forward-Reverse Steps
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Solution Overview
Problem
Conventional methods for forming staircase structures in vertical memory arrays face challenges in achieving precise step widths and positions, leading to increased errors and defects such as contact punch through and current leaks, which diminish memory device performance, reliability, and durability.
Innovation Solution
A method involving the formation of a patterned mask structure with controlled openings to create trenches and spacer structures in a stack structure, allowing for precise alignment and positioning of conductive structures, thereby reducing errors and enhancing memory density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of steps in the staircase structure is increased to provide additional memory density, then the memory density is improved, but the manufacturing precision deteriorates due to compounded errors in repeated trimming and etching acts
Solution Approach 1:
The patent divides the staircase structure formation into separate forward and reverse staircase structures, each formed with fewer steps. This segmentation reduces the number of repeated trimming and etching acts needed for each structure, thereby reducing compounded manufacturing errors while still achieving the desired memory density through the combined structure.
Solution Approach 2:
The patent introduces a central region between the forward and reverse staircase structures that vertically underlies both structures. This dimensional arrangement allows the contact structure to access multiple tiers through a shared central region, reducing the horizontal footprint and allowing more steps to be accommodated without proportionally increasing the overall structure width.
2Quantity of substance
If the number of steps in the staircase structure is increased to provide additional memory density, then the memory density is improved, but the device complexity increases due to additional repeated acts of trimming and etching
Solution Approach 1:
The formation process is segmented into separate forward and reverse staircase structures with distinct mask structures (first mask structure and second mask structure). This segmentation allows each structure to be formed with fewer independent acts, reducing the overall process complexity while maintaining high memory density through the combined multi-tier access capability.
3Manufacturing precision
If conventional methods are used to form staircase structures with small margins of error, then the manufacturing precision may be maintained, but the yield decreases due to improperly positioned contact structures and defects
Solution Approach 1:
The patent designs the staircase structures with a central region that vertically underlies both forward and reverse structures. This beforehand cushioning design provides a tolerance buffer that accommodates normal manufacturing variations without causing contact structure mispositioning or defects, thereby maintaining high yield while achieving precise step positioning.
Data Source
AI summary
A microelectronic device comprises a stack structure, a stadium structure within the stack structure, and conductive contact structures. The stack structure comprises a vertically alternating sequence of conductive structures and insulative structures arranged in tiers. Each of the tiers comprises one of the conductive structures and one of the insulative structures. The stadium structure comprises a forward staircase structure having steps comprising edges of the tiers, and a reverse staircase structure opposing the forward staircase structure and having additional steps comprising additional edges of the tiers. The conductive contact structures vertically extend to upper vertical boundaries of at least some of the conductive structures of the stack structure at the steps of the forward staircase structure and the additional steps of the reverse staircase structure, and are each integral and continuous with one of the conductive structures. Memory devices, electronic systems, and methods of forming microelectronic devices are also described.