Memory Controller State Code Backup for Sudden Power-Off Recovery
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Solution Overview
Problem
Existing nonvolatile memory devices face challenges in efficiently completing program operations when sudden power-off occurs, particularly in multi-level cell modes, due to the increased capacity requirements for data backup and the resulting need for additional auxiliary power supplies.
Innovation Solution
A method involving preprogramming multi-page data to memory cells with threshold voltages corresponding to multiple states, generating a state group code with fewer bits than the original data, backing up this code during power-off, and recovering and reprogramming the data based on the state group code after power restoration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data backup is performed for memory cells programmed in MLC mode during sudden power-off, then data reliability is improved, but auxiliary power supply capacity requirements increase
Solution Approach 1:
The data backup process is segmented into two phases: first, a state group code (compressed representation) is backed up during sudden power-off; second, the complete multi-page data is recovered and reprogrammed after power restoration. This segmentation allows critical state information to be preserved with minimal power requirements while maintaining data reliability.
Solution Approach 2:
The patent changes the parameter representation by encoding multi-page data into a state group code with fewer bits. This parameter transformation reduces the amount of data that needs to be backed up during sudden power-off, thereby reducing auxiliary power supply capacity requirements while preserving essential state information for data recovery.
2Measurement precision
If complete multi-page data is backed up during sudden power-off, then data recovery accuracy is improved, but memory capacity requirements increase
Solution Approach 1:
Instead of backing up the complete multi-page data, the patent creates a compressed copy in the form of a state group code that represents the essential state information. This copy is sufficient for accurate data recovery after power restoration, reducing memory capacity requirements while maintaining data recovery accuracy.
Solution Approach 2:
The state group code is generated and backed up as a preliminary action during sudden power-off. This preliminary encoding of state information enables accurate data recovery without requiring the storage of complete multi-page data, thus reducing memory capacity requirements while preserving data recovery accuracy.
3Ease of manufacture
If state group code is used instead of complete data for backup, then manufacturing cost is reduced, but data recovery complexity increases
Solution Approach 1:
The patent implements a dynamic data recovery process that adapts based on the available state group code. The memory controller dynamically recovers and reprograms multi-page data after power restoration, balancing the reduced backup complexity with efficient recovery operations. This dynamic approach reduces manufacturing costs while managing data recovery complexity through automated processes.
Data Source
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AI summary
An operating method of a memory system includes preprogramming multi-page data of a memory controller to a nonvolatile memory device, generating a state group code based on multi-bit data of the multi-page data, and each state group data of the state group code having less number of bits than corresponding multi-bit data, detecting whether sudden power-off occurring after the preprogramming, backing up, in response to the detecting of the sudden power-off occurring, the state group code to the nonvolatile memory device, recovering, after power is recovered from the sudden power-off, the multi-page data from the nonvolatile memory device, based on the state group code, reprogramming the multi-page data to the nonvolatile memory device, and reprogramming, in response to the detecting of the sudden power-off not occurring, the multi-page data of the memory controller to the nonvolatile memory device.