Memory Cell State Mapping for Fractional Bit Storage
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Solution Overview
Problem
Existing memory technologies face challenges in efficiently mapping between program states and data patterns, particularly in fractional bit per cell configurations, leading to error multiplication and propagation, and require additional redundancy or code expansion.
Innovation Solution
The method involves programming a group of memory cells such that their combined program states map to a constellation point corresponding to a data pattern, using a polynomial expression to determine the mapping between program states and data patterns, thereby avoiding redundancy and error propagation, and allowing for effective fractional bit per cell mapping without code expansion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional mapping methods are used for fractional bit per cell configurations, then memory capacity can be utilized, but error multiplication and propagation occur
Solution Approach 1:
The patent changes the mapping parameters by using a polynomial expression of order G to map N-unit data patterns to program states of G memory cells. This mathematical transformation fundamentally alters how data is encoded, preventing error multiplication while maintaining fractional bit per cell capacity. The polynomial mapping creates a bijective relationship between data patterns and program states, ensuring reliable error-free operation.
Solution Approach 2:
The patent introduces a polynomial expression as an intermediary mathematical structure between the raw data pattern and the memory cell program states. This polynomial mediator transforms the mapping relationship, allowing fractional bit per cell operation without direct error propagation. The intermediary polynomial structure decouples the data representation from the physical memory states, preventing harmful error multiplication.
2Reliability
If redundancy or code expansion is added to prevent errors, then reliability improves, but device complexity increases
Solution Approach 1:
The polynomial mapping method is self-sufficient in preventing errors without requiring external redundancy mechanisms or complex error correction codes. The mapping itself inherently prevents error multiplication and propagation through its mathematical structure, making additional error prevention layers unnecessary. The system serves its own error prevention needs through the bijective polynomial transformation.
Solution Approach 2:
By changing the fundamental mapping parameters from conventional methods to polynomial-based mapping, the patent achieves error prevention without adding redundancy. The polynomial expression of order G creates a natural error-resistant mapping that eliminates the need for complex error correction mechanisms, maintaining device simplicity while ensuring reliability.
3Quantity of substance
If fractional bit per cell mapping is implemented, then memory density increases, but mapping complexity increases
Solution Approach 1:
The patent segments the mapping problem into a structured polynomial framework of order G, where N-unit data patterns are systematically divided and mapped to G memory cell program states. This segmentation approach organizes the fractional bit per cell mapping into manageable mathematical components, reducing perceived complexity while achieving high memory density.
Solution Approach 2:
The polynomial mapping method serves multiple functions simultaneously: it enables fractional bit per cell operation, prevents error multiplication, and provides a systematic mapping framework. This universal approach handles various fractional bit configurations (e.g., 1.5 bits/cell, 2.25 bits/cell) through the same polynomial structure, simplifying the overall mapping complexity despite high memory density requirements.
Data Source
AI summary
The present disclosure includes methods and apparatuses for mapping between program states and data patterns. One method includes: programming a group of G memory cells such that a combination of respective program states of the group maps to a constellation point corresponding to a received N unit data pattern, the group used to store N/G units of data per memory cell; wherein the constellation point is one of a number of constellation points of a constellation associated with mapping respective program state combinations of the group of memory cells to N unit data patterns; and wherein the constellation comprises a first mapping shell and a second mapping shell, the constellation points corresponding to the respective first and second mapping shells determined, at least partially, based on a polynomial expression of order equal to G.


