Memory Device Test Mode State Machine for Automated Self-Testing
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Solution Overview
Problem
Existing production testers are limited in their ability to implement testing sequences for memory devices that require short time delays between read and write operations, leading to manual modification of microcode, which is time-consuming and prone to errors, thereby reducing manufacturing throughput and increasing the risk of improper testing.
Innovation Solution
A state machine is integrated into the memory device to queue and execute multiple commands, including read, write, and delay operations, in response to a trigger signal, allowing for more complex and efficient testing sequences without the need for manual microcode modification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If production testers manually modify microcode to implement testing sequences with short time delays, then testing accuracy is improved, but manufacturing throughput deteriorates and time consumption increases
Solution Approach 1:
The memory device performs self-testing through integrated BIST functionality, eliminating the need for external production testers to manually modify microcode. The device autonomously executes testing sequences with precise timing control, resolving the contradiction by making the system self-sufficient rather than relying on time-consuming external interventions
Solution Approach 2:
The patent pre-configures testing sequences and timing parameters within the memory device before production testing occurs. By preparing the test environment and parameters in advance through the state machine and register configurations, the system eliminates on-the-fly microcode modification, thereby maintaining both testing accuracy and manufacturing throughput
2Reliability
If production testers manually modify microcode for each testing sequence, then testing reliability is improved, but device complexity and time consumption increase
Solution Approach 1:
The memory device uses built-in self-test functionality with a state machine that autonomously manages testing sequences. This eliminates the need for complex external microcode modifications while maintaining reliable testing through integrated control logic and pre-configured parameters
Solution Approach 2:
The state machine and register configuration system provide a universal interface for managing multiple testing sequences. Rather than requiring separate microcode modifications for each test, the system uses a unified state machine that can handle various testing scenarios through configurable parameters, reducing overall system complexity
3Manufacturing precision
If manual microcode modification is performed for testing sequences, then testing precision is improved, but manufacturing time increases
Solution Approach 1:
Testing sequences and timing parameters are pre-configured within the memory device through the state machine and register settings before production testing. This preliminary configuration eliminates time-consuming manual microcode modification during manufacturing while maintaining precise testing through pre-established parameters
Solution Approach 2:
The memory device autonomously executes precise testing sequences using its built-in state machine and timing control, eliminating the need for external intervention. This self-service capability maintains manufacturing precision while significantly reducing the time lost to manual microcode modifications
4Reliability
If production testers implement complex testing sequences, then testing completeness is improved, but ease of operation deteriorates
Solution Approach 1:
The memory device performs self-testing with comprehensive coverage through integrated BIST functionality. The state machine automatically manages complex testing sequences without requiring external production testers to manually configure or monitor each step, thereby maintaining testing completeness while dramatically improving ease of operation
5Measurement precision
If manual microcode modification is performed, then testing accuracy is improved, but productivity and time efficiency deteriorate
Solution Approach 1:
The memory device autonomously executes accurate testing sequences with precise timing control through its built-in state machine. This self-service capability maintains high testing accuracy while eliminating time inefficiencies associated with manual microcode modification, as the device independently manages its own testing processes
Solution Approach 2:
Testing parameters and timing configurations are pre-established within the memory device before production testing. This preliminary setup ensures accurate testing execution while improving time efficiency by eliminating on-the-fly microcode modifications during the manufacturing process
Data Source
AI summary
Systems, methods, and apparatus for a memory device having test mode state machines configured to perform self-testing. In one approach, a memory array has memory cells. Periphery logic of the memory device receives a command from a host device to initiate self-testing. The periphery logic generates trigger signal(s) in response to receiving the command. Control circuitry (e.g., a controller) has state machine(s) that receives the trigger signal(s) and initiates execution of a command sequence. The command sequence includes various orders of operations such as read, write, or delay. A state machine can be integrated into each of multiple partitions of the memory array.