Non-Volatile Memory State Transition Without Erase Delay

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing non-volatile memory systems require a time-consuming erase step before overwriting data, which slows down the programming process.

Innovation Solution

A method to transition non-volatile memory cells from a programmed data state with higher threshold voltages directly to a lower threshold voltage state without going through the erased state, thereby bypassing the erase step.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the traditional erase-then-program process is used, then data can be reliably overwritten, but the programming speed is slow due to the time-consuming erase step

Engineering Contradiction:
Improveprogramming speedVSAvoidtime for erase step
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent extracts and removes the erase step from the traditional programming process. By directly transitioning memory cells from one programmed state to another programmed state without intermediate erasure, the time-consuming erase operation is eliminated while maintaining data reliability through controlled threshold voltage transitions.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies preliminary actions by pre-positioning charge in specific regions of the memory cell structure (such as in the charge trap layer or floating gate) to enable direct state transitions. This preliminary charge positioning allows the memory cell to transition between programmed states without requiring full erasure, thereby speeding up the programming process.

Inventive Principle:
Principle #10Preliminary action

2Loss of time

If the erase step is eliminated to speed up programming, then programming time is reduced, but the reliability of data overwriting may be compromised

Engineering Contradiction:
Improveprogramming timeVSAvoiddata overwriting reliability
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The patent changes the threshold voltage parameter of memory cells in a controlled manner, transitioning directly from one programmed state (with higher threshold voltage) to another programmed state (with lower threshold voltage). This parameter-based transition approach eliminates the need for erasure while maintaining reliability through precise voltage control and verification processes.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent incorporates feedback mechanisms to verify that memory cells have successfully transitioned to the target programmed state. By monitoring threshold voltage levels and using verification reads, the system ensures data overwriting reliability even without the traditional erase step, allowing the process to correct or re-attempt transitions as needed.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12475958B2Non-volatile memory with decline state operation
Publication Date: 2025.11.18 SANDISK TECHNOLOGIES LLC
  • US12475958B2 patent drawing
  • US12475958B2 patent drawing
  • US12475958B2 patent drawing

AI summary

A non-volatile memory is configured to transition memory cells from programmed data states with the higher ranges of threshold voltages to programmed data states with the lower ranges of threshold voltages without the transitioning the memory cells to the erased data state.