Semiconductor Memory Stepwise Program Voltage Control

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Solution Overview

Problem

Semiconductor memory devices face reliability issues due to uneven program voltage distribution across memory cells, leading to distortion in threshold voltages and reduced reliability.

Innovation Solution

A semiconductor memory device that stepwisely increases program voltage from a start voltage to a target voltage during program loops, ensuring consistent voltage application across all memory cells, thereby reducing threshold voltage distortion and improving reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If program voltage is applied uniformly across all memory cells, then manufacturing simplicity is maintained, but threshold voltage distortion occurs leading to reduced reliability

Engineering Contradiction:
Improvedata storage stabilityVSAvoidvoltage control complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies dynamic voltage control by adjusting the program voltage level based on the position of memory cells. Different word lines receive different program voltages that are dynamically determined by their position, allowing compensation for voltage distribution variations while maintaining a relatively simple device structure.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements local quality by applying different program voltage levels to different regions of the memory cell array. Specifically, memory cells at different positions (e.g., near vs. far from the voltage source) receive customized voltage levels to compensate for positional variations, thereby achieving uniform threshold voltage distribution across the entire array.

Inventive Principle:
Principle #3Local quality

2Reliability

If stepwise voltage increase is applied during program loops, then threshold voltage distortion is reduced, but program operation time increases

Engineering Contradiction:
Improvethreshold voltage consistencyVSAvoidprogram operation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the program operation into multiple program loops, where each loop applies a specific voltage level. By dividing the overall programming process into discrete steps with incremental voltage increases, the patent achieves better threshold voltage control while managing the total programming time through optimized loop structures.

Inventive Principle:
Principle #1Segmentation

3Manufacturing precision

If program voltage is increased to compensate for voltage drop, then programming accuracy improves, but excessive voltage stress damages memory cells

Engineering Contradiction:
Improveprogramming accuracyVSAvoidvoltage stress damage
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The patent changes the voltage parameter dynamically based on memory cell position and programming progress. Instead of applying a fixed high voltage that could cause damage, the system adjusts voltage levels to optimal values for each specific case, achieving accurate programming while avoiding excessive voltage stress through precise parameter control.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10049748B2Semiconductor memory device and method for program operation having program loops by step voltage
Publication Date: 2018.08.14 SK HYNIX INC
  • US10049748B2 patent drawing
  • US10049748B2 patent drawing
  • US10049748B2 patent drawing

AI summary

Provided herein are a semiconductor memory device and a method of operating the semiconductor memory device. The semiconductor memory device includes a memory cell array including a memory cell array including a plurality of memory cells, a peripheral circuit configured to perform a program operation, which includes a plurality of program loops, on selected memory cells among the plurality of memory cells and a control circuit configured to control the peripheral circuit so that a program voltage applied to a selected word line, to which the selected memory cells are coupled, is stepwisely increased from a program start voltage to a target program voltage by a step voltage, which is a voltage increment of the program voltage, during a preset time period of a respective program loop.