Memory Storage Parallel Writing via Discontinuous Data Access
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Solution Overview
Problem
Existing memory storage devices face challenges in achieving efficient parallel writing of data across multiple word lines due to the high resource consumption required for buffering continuous data, which can limit writing performance if sufficient buffer memory is not available.
Innovation Solution
A data writing method that allows for the simultaneous writing of physical pages on multiple word lines by requesting and obtaining discontinuous data from the host system, reducing the need for large buffer memory by directly accessing and writing data to specific physical pages on different word lines through separate data buses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If continuous data is temporarily stored in buffer memory for parallel writing, then writing speed is improved, but buffer memory capacity requirement increases
Solution Approach 1:
The patent segments the buffer memory into multiple sub-buffers, each corresponding to different word lines or data blocks. This allows parallel writing operations to use different sub-buffers simultaneously, improving writing speed while reducing the total buffer memory capacity needed compared to a single large buffer.
Solution Approach 2:
The patent introduces a time dimension to the buffer management by implementing a circular buffer structure with read/write pointers that wrap around. This allows the same physical buffer memory to be reused across multiple writing cycles, effectively increasing the buffering capacity without requiring additional physical memory resources.
2Productivity
If large capacity buffer memory is disposed, then parallel writing performance is improved, but device cost and complexity increase
Solution Approach 1:
The buffer memory is designed to serve multiple functions: it acts as both a data buffer for parallel writing operations and a temporary storage for data alignment. The same buffer structure supports both continuous and discontinuous data patterns, reducing the need for separate specialized memory structures and thereby lowering device complexity.
Solution Approach 2:
The patent dynamically adjusts buffer allocation parameters based on the writing pattern detected. When parallel writing is identified, the system activates the segmented buffer structure with appropriate pointer configurations. For sequential writing, the buffer operates in a simplified mode, reducing control logic complexity while maintaining writing performance.
Data Source
AI summary
A data writing method, a memory control circuit unit, and a memory storage device are provided. The data writing method includes transmitting a command to a host system to obtain a plurality of data, wherein the plurality of data are arranged in a sequence order in the host system, obtaining first data among the plurality of data and obtaining second data after obtaining the first data. The method further includes writing the first data to a corresponding physical page on a first word line among a plurality of word lines, and writing the second data to another corresponding physical page on a second word line among the plurality of word lines, wherein the first and second word lines belong to first and second memory sub-modules, and the first data and the second data are discontinuously arranged in the sequence order. The first and second data may each comprise sub-data, and the sub-data may be written into physical pages on the first and second word lines.