Memory String Dummy-Cell Isolation for Program Disturbance

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

As semiconductor devices scale down, increasing memory density leads to undesired coupling and interference between memory cells, causing program disturbance and reducing data reliability, which affects performance and reliability of non-volatile memory devices.

Innovation Solution

Implementing a memory device with dummy cells and specific voltage schemes that apply different voltages to various electrical lines to minimize electron transfer during programming, thereby reducing program disturbance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory device integration is increased to enhance device performance and price competitiveness, then memory density is improved, but undesired coupling and interference between memory cells increases causing program disturbance

Engineering Contradiction:
Improvememory densityVSAvoiddata reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The memory string is segmented by introducing dummy cells that divide the memory string into multiple sections. These dummy cells act as isolation barriers that segment the electrical coupling between memory cells, thereby reducing interference while maintaining high density integration.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Dummy cells are introduced as intermediary elements between selected and unselected memory cells. These intermediary dummy cells absorb or block the electrical disturbance that would otherwise couple to unselected cells during programming operations, thus protecting data reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If voltage is applied to selected word line to program selected memory cell, then programming operation is performed, but unselected cells on the same word line are inadvertently programmed

Engineering Contradiction:
Improveprogramming speedVSAvoiddata reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Dummy cells are activated in advance during the programming operation to establish protective barriers before the main programming voltage is applied to the selected word line. This preliminary action prevents the spread of programming voltage to unselected cells.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Different voltage levels are applied to different sections of the memory array by utilizing the dummy cells. The dummy cells create localized voltage conditions that allow the selected cell to be programmed while maintaining different electrical conditions in adjacent unselected cell regions.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed solution effectively reduces program disturbance, enhancing data retention and reliability by minimizing unintended programming of unselected cells.

Implementation Method 1

minimize electron transfer during programming

Methodology Applied
Scientific EffectElectron transfer:

Implementation Method 2

apply different voltages to various electrical lines

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS12412609B2Method of reducing program disturbance in memory device and memory device utilizing same
Publication Date: 2025.09.09 YANGTZE MEMORY TECH CO LTD
  • US12412609B2 patent drawing
  • US12412609B2 patent drawing
  • US12412609B2 patent drawing

AI summary

In some aspects, a memory device is provided. The memory device includes a plurality of memory strings and a peripheral circuit. One of the memory strings includes memory cells, a select transistor coupled to a select line and a bit line, and a dummy cell coupled to a dummy word line and arranged between the select transistor and the memory cells. The peripheral circuit is coupled to the memory strings and configured to, in a pre-pulse period of a program operation, maintain a first voltage on the select line to retain an on-state of the select transistor and apply a second voltage to the dummy word line to turn off the dummy cell. After applying the second voltage to the dummy word line, the peripheral circuit is further configured to apply a third voltage to the select line to turn off the select transistor.