3D Memory String Pipe Gate Well Isolation Leakage

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Solution Overview

Problem

Existing semiconductor devices with three-dimensional memory strings face challenges in maintaining operating reliability due to current leakage issues from drive transistors in peripheral circuits, which affect the performance and integrity of memory operations.

Innovation Solution

A semiconductor device design that includes a semiconductor substrate divided into areas with specific well structures and dopant types, where a first well of a different type is formed to separate the memory string area from the peripheral circuit area, and a pipe gate is electrically connected to a second well, preventing current leakage and enhancing separation between these regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If drive transistors are used in peripheral circuits to control memory strings, then memory operation control is enabled, but current leakage occurs from drive transistors affecting memory operation reliability

Engineering Contradiction:
Improvememory operation controlVSAvoidmemory operation reliability
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The semiconductor substrate is divided into a first area for memory string and a second area for peripheral circuit, with a first well formed between them to segment and isolate the two regions, preventing current leakage from affecting memory operations

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A first well of opposite type is introduced as an intermediary region between the memory string area and peripheral circuit area, acting as a barrier to block current leakage paths while allowing both regions to function independently

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If memory cells are three-dimensionally arranged to improve integration, then storage capacity increases, but current leakage paths become more complex and harder to control

Engineering Contradiction:
Improvestorage capacityVSAvoidcurrent leakage control
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The three-dimensionally arranged memory cells are segmented into distinct memory string regions separated by first wells, creating isolated current paths that prevent leakage from propagating through the vertical structure

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the three-dimensional memory structure are given different doping types and characteristics - the first well regions have opposite type doping to create local barriers that control current flow in specific areas of the vertical memory strings

Inventive Principle:
Principle #3Local quality

3Reliability

If first well and second well structures are formed with different dopant types, then current leakage is prevented through electrical isolation, but device structure complexity increases

Engineering Contradiction:
Improvecurrent leakage preventionVSAvoidwell structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The substrate is segmented into regions with different well structures - first wells of one type and second wells of opposite type - creating a systematic pattern that achieves isolation while maintaining manufacturing regularity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The dual well structure serves multiple functions simultaneously: the first wells isolate memory from peripheral circuits, the second wells provide additional isolation layers, and together they create a scalable pattern that can be applied throughout the device

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9831263B2Semiconductor device including three dimensional memory string
Publication Date: 2017.11.28 SK HYNIX INC
  • US9831263B2 patent drawing
  • US9831263B2 patent drawing
  • US9831263B2 patent drawing

AI summary

A semiconductor device includes a semiconductor substrate divided into a first area and a second area, the semiconductor substrate including a first dopant of a first type, a first well formed to a first depth in the first area of the semiconductor substrate, the first well including a second dopant of a second type, wherein the second type is different from the first type, a second well including a third dopant of the first type, the second well being surrounded by the first well, and a pipe gate formed on the first area of the semiconductor substrate, the pipe gate being electrically connected to the second well.