3D Memory String Precharge Control for Threshold Voltage Stability

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Solution Overview

Problem

During a program operation in a memory device with a three-dimensional structure, unselected memory cells experience an increase in threshold voltage due to insufficient precharging of channel layers, leading to reliability issues.

Innovation Solution

A memory device with a voltage generator that applies a turn on voltage during a first time to precharge the channel layer and a negative voltage during a second time to maintain the precharge level, along with a method to compare program loops or page numbers to adjust the voltage application accordingly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a precharge voltage is applied to the source line to precharge unselected strings, then the threshold voltage of unselected memory cells is prevented from increasing, but the channel layer may not be sufficiently precharged leading to programming reliability issues

Engineering Contradiction:
Improveprogramming reliabilityVSAvoidchannel layer precharge level
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent changes the voltage parameter applied to the source select line during precharge operation. Instead of applying only a turn on voltage, the system applies a negative voltage to the source select line while maintaining the precharge voltage on the source line. This parameter change ensures that the channel layer is sufficiently precharged to the correct potential level, preventing threshold voltage increase in unselected memory cells and ensuring programming reliability.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a turn on voltage is applied to the source select line to transfer precharge voltage to the channel layer, then the channel layer is precharged, but the threshold voltage of unselected memory cells may still increase due to insufficient precharge

Engineering Contradiction:
Improvememory cell threshold voltage stabilityVSAvoidvoltage application control
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements periodic action by applying different voltages to the source select line at different times during the precharge operation. The control circuit applies a turn on voltage during a first time period to transfer precharge voltage to the channel layer, then applies a negative voltage during a second time period to maintain the precharge level. This time-periodic voltage application ensures complete and stable precharging while maintaining device control simplicity.

Inventive Principle:
Principle #19Periodic action

3Productivity

If the source select line is held at turn on voltage throughout the precharge process, then the channel layer is continuously precharged, but the precharge voltage cannot be maintained at the correct level

Engineering Contradiction:
Improveprecharge operation speedVSAvoidprecharge voltage level
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies dynamics by making the voltage applied to the source select line time-dependent rather than static. The control circuit dynamically switches the voltage from a turn on voltage during a first time period to a negative voltage during a second time period. This dynamic voltage adjustment allows the system to first rapidly transfer precharge voltage to the channel layer, then maintain the correct precharge level, thereby achieving both high productivity and manufacturing precision.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12518837B2Memory device including precharge voltage control and method of operating the memory device
Publication Date: 2026.01.06 SK HYNIX INC
  • US12518837B2 patent drawing
  • US12518837B2 patent drawing
  • US12518837B2 patent drawing

AI summary

The present technology includes a memory device and a method of operating the same. The memory device includes a string including a first select transistor, memory cells, and a second select transistor connected between a source line and a bit line, and a voltage generator configured to supply a precharge voltage to the source line and selectively apply a turn on voltage or a negative voltage to a first select line connected to a gate of the first select transistor. The voltage generator is configured to apply the precharge voltage to the source line, apply the turn on voltage to the first select line during a first time in which a channel layer of the string is precharged, and apply the negative voltage to the first select line during a second time in which the channel layer of the string is precharged, while precharging the channel layer of the string.