Nonvolatile Memory String Read Tracing First Erased Page

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Solution Overview

Problem

Data storage devices face challenges in efficiently tracing and resuming write operations after a sudden power loss, particularly in identifying the first erased page in a memory block, which is crucial for maintaining data integrity and minimizing power consumption.

Innovation Solution

A data storage device and method that perform a string read operation across multiple word lines to estimate the data storage rate and select a trace region, allowing for rapid identification of the first erased page by applying the same read voltage to all word lines and transmitting string read data to a controller, which then determines the trace region and traces the first erased page.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a conventional read operation is performed on each word line sequentially to trace the first erased page, then the tracing operation can be completed with high precision, but the power consumption increases and the operation time extends

Engineering Contradiction:
Improvetracing precisionVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent merges multiple read operations into a single string read operation that reads multiple word lines simultaneously. The memory block performs string read operations on a plurality of word lines in parallel, combining what would otherwise be sequential operations into one unified operation that achieves the same tracing precision with reduced power consumption and time.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent segments the memory block into multiple strings, each containing multiple word lines. By performing string read operations on segmented strings in parallel rather than reading word lines sequentially within a single string, the system achieves faster tracing with lower overall power consumption while maintaining tracing precision through the segmented parallel architecture.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If a conventional read operation is performed on each word line sequentially to trace the first erased page, then the tracing operation can be completed with high precision, but the operation time extends

Engineering Contradiction:
Improvetracing precisionVSAvoidoperation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent merges multiple read operations into a single string read operation that reads multiple word lines simultaneously. The memory block performs string read operations on a plurality of word lines in parallel, combining what would otherwise be sequential operations into one unified operation that achieves the same tracing precision with reduced power consumption and time.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent segments the memory block into multiple strings, each containing multiple word lines. By performing string read operations on segmented strings in parallel rather than reading word lines sequentially within a single string, the system achieves faster tracing with lower overall power consumption while maintaining tracing precision through the segmented parallel architecture.

Inventive Principle:
Principle #1Segmentation

3Productivity

If string read operation is performed on multiple word lines simultaneously, then the operation speed increases and power consumption decreases, but the device complexity increases

Engineering Contradiction:
Improveoperation speedVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements a universal string read operation mechanism that can simultaneously read multiple word lines across different strings using the same control logic and voltage application circuitry. The controller is designed to universally apply read voltages to multiple word lines in parallel, achieving high-speed operation without proportionally increasing device complexity through reusable and scalable circuit designs.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent performs preliminary actions by pre-configuring the memory block's string structure and control logic to enable simultaneous read operations. The controller is pre-designed with the capability to apply read voltages to multiple word lines in parallel, and the memory block is structured with strings that are ready for simultaneous access, eliminating the need for complex runtime coordination and reducing overall device complexity.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9570187B2Data storage device and operating method thereof
Publication Date: 2017.02.14 MIMIRIP LLC
  • US9570187B2 patent drawing
  • US9570187B2 patent drawing
  • US9570187B2 patent drawing

AI summary

A data storage device may include: a nonvolatile memory device including a memory block; and a controller suitable for controlling the nonvolatile memory device to perform a string read operation on the memory block, and estimating a data storage rate of the memory block based on string read data acquired through the string read operation. When performing the string read operation, the nonvolatile memory device may apply the same read voltage to a plurality of word lines included in the memory block at the same time, acquire the string read data from the memory block according to the read voltage, and transmit the string read data to the controller.