Nonvolatile Memory Strings With Opposite Bit Lines

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Solution Overview

Problem

Three-dimensional NAND flash memory devices face unintended operations during program operations due to semi-selected states of memory strings, leading to potential erroneous writes.

Innovation Solution

The nonvolatile semiconductor storage device employs a staggered arrangement of select transistors and memory cell transistors, with distinct bit and source lines for even and odd-numbered bit lines, ensuring each memory string is independently selected and preventing semi-selected states by using separate select gate lines and voltage control mechanisms.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory strings are arranged with bit lines on the same side, then device structure is simpler, but semi-selected states cause unintended operations during program operations

Engineering Contradiction:
Improvedata integrityVSAvoidbit line arrangement
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the bit line arrangement into two distinct groups: even-numbered bit lines and odd-numbered bit lines, positioned on opposite sides of the memory strings. This segmentation prevents semi-selected states by ensuring that only fully selected memory strings can be programmed, thereby eliminating unintended operations while maintaining structural organization through systematic grouping.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements different spatial configurations for different bit lines: even-numbered bit lines are positioned on one side of the memory strings while odd-numbered bit lines are positioned on the opposite side. This local differentiation in bit line placement creates asymmetric structures that inherently prevent semi-selected states, improving reliability without requiring complex control mechanisms.

Inventive Principle:
Principle #3Local quality

2Reliability

If separate select gate lines and voltage control mechanisms are used, then unintended operations are prevented, but device complexity increases

Engineering Contradiction:
Improveprogramming accuracyVSAvoidcontrol mechanism
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs dynamic voltage control mechanisms that adjust select gate line voltages based on the specific bit line being accessed. By dynamically controlling the voltage applied to select gate lines corresponding to even or odd bit lines, the system enables precise programming of fully selected memory strings while automatically preventing unintended operations in semi-selected states through voltage-based selection control.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11955176B2Nonvolatile semiconductor storage device having memory strings and bit lines on opposite sides of the memory strings
Publication Date: 2024.04.09 KIOXIA CORP
  • US11955176B2 patent drawing
  • US11955176B2 patent drawing
  • US11955176B2 patent drawing

AI summary

A nonvolatile semiconductor storage device includes first and second semiconductor layers extending in a first direction and spaced apart in a second direction, first and second bit lines extending in the second direction and respectively arranged on opposite sides of the semiconductor layers in the first direction, first and second source lines extending in a third direction and respectively arranged on opposite sides of the semiconductor layers in the first direction, a first memory string including first and second select transistors connected to the first bit line and the first source line, respectively, a second memory string including third and fourth select transistors connected to the second bit line and the second source line, respectively, a first select gate line connected to gates of the first and fourth select transistors, and a second select gate line connected to gates of the second and third select transistors.