3D Memory Cell Strings With Recessed Contacts and Lateral Isolation
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Solution Overview
Problem
Current memory array fabrication methods face challenges in efficiently forming vertically-stacked memory cells with direct electrical coupling and lateral isolation, particularly in achieving reliable contact regions for wordlines and memory cell structures that maintain data retention and operational efficiency.
Innovation Solution
The method involves forming a stack of vertically-alternating insulative and conductive tiers with channel openings that directly couple to the conductor tier, using a 'gate-first' or 'gate-last' process, and incorporating charge-blocking and storage materials within the memory cells, along with conductive vias and insulating interfaces to ensure electrical isolation and access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If vertically-stacked memory cells are formed using conventional fabrication methods, then three-dimensional integration is achieved, but reliable electrical coupling and lateral isolation between cells becomes difficult to maintain
Solution Approach 1:
The memory cell structure is segmented into distinct functional regions: channel openings for current flow, charge-blocking regions for electrical isolation, and charge-storage regions for data retention. This segmentation allows each region to be optimized independently, ensuring reliable electrical coupling where needed and effective lateral isolation where required, thereby resolving the contradiction between 3D integration density and reliability of electrical connections.
Solution Approach 2:
Different materials and structures are applied to different locations within the memory cell: conductive materials in channel regions for electrical coupling, insulating charge-blocking materials in isolation regions for lateral separation, and charge-storage materials in gate regions for data retention. This local differentiation of properties enables simultaneous achievement of reliable electrical coupling and effective lateral isolation in the vertically-stacked architecture.
2Speed
If direct electrical coupling between wordlines and memory cells is implemented, then access speed improves, but manufacturing precision requirements increase
Solution Approach 1:
Conductor-material contacts are formed within channel openings before final memory cell assembly, establishing pre-positioned electrical coupling pathways between wordlines and memory cells. This preliminary action ensures that direct electrical connections are already in place, enabling fast wordline access while reducing the precision burden on subsequent manufacturing steps, as the critical alignment has been accomplished in advance.
3Ease of manufacture
If conventional memory array architectures are used, then fabrication process simplicity is maintained, but data retention and operational efficiency decrease
Solution Approach 1:
The memory cell structure employs a nested configuration where charge-storage materials are positioned within gate regions, which are themselves surrounded by charge-blocking regions, all contained within vertically-stacked channel openings. This nested arrangement achieves superior data retention and operational efficiency by ensuring complete electrical isolation and controlled charge storage, while the entire structure is formed using sequential deposition and etching processes that maintain relative fabrication simplicity.
Data Source
AI summary
A method used in forming a memory array comprising strings of memory cells comprises forming a stack comprising vertically-alternating first tiers and second tiers. A channel-material string is in individual channel openings in the vertically-alternating first tiers and second tiers. A conductor-material contact is in the individual channel openings directly against the channel material of individual of the channel-material strings. The conductor-material contacts are vertically recessed in the individual channel openings. A conductive via is formed in the individual channel openings directly against the vertically-recessed conductor-material contact in that individual channel opening. Other aspects, including structure independent of method, are disclosed.