Memory Block Stripe Assignment Based on Bad Block Conditions
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Solution Overview
Problem
Existing memory devices face challenges in managing block stripe assignment due to varying tolerances for bad blocks, leading to increased failure rates and discard rates, as different types of memory (e.g., SLC and QLC) have different tolerances for bad blocks, and current methods fail to dynamically adapt stripe assignments based on error conditions.
Innovation Solution
A memory sub-system controller identifies and dynamically designates block stripes as SLC or QLC based on the quantity of bad blocks, allocating those with higher bad blocks to SLC memory and those with lower bad blocks to QLC memory, thereby optimizing stripe assignments to enhance device flexibility and yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If block stripes are assigned to memory types based on fixed rules, then device complexity is reduced, but memory device flexibility and yield decrease due to inability to adapt to varying bad block distributions
Solution Approach 1:
The patent implements dynamic block stripe assignment by determining the quantity of bad blocks in each block stripe and adaptively designating them as SLC or QLC memory types based on their error conditions. This dynamic approach allows the system to optimize memory allocation based on actual device characteristics rather than following fixed predetermined rules, thereby increasing flexibility while managing complexity through systematic evaluation criteria
Solution Approach 2:
The system changes the parameter of block stripe designation from fixed to variable based on bad block quantity. By evaluating the actual number of bad blocks in each stripe and adjusting the memory type assignment accordingly, the system adapts to varying device conditions, improving flexibility and yield without requiring overly complex manual configuration
2Reliability
If all block stripes are designated as QLC memory, then storage capacity is maximized, but device reliability decreases due to higher sensitivity to bad blocks
Solution Approach 1:
The patent applies local quality by designating different block stripes as different memory types (SLC or QLC) based on their specific bad block characteristics. Instead of uniformly designating all stripes as QLC, the system evaluates each stripe's error conditions and assigns appropriate memory types locally, ensuring that stripes with higher bad block counts are designated as more reliable SLC memory while preserving QLC capacity where appropriate
Solution Approach 2:
The system performs beforehand cushioning by proactively identifying block stripes with high bad block quantities and designating them as SLC memory before they can cause failures. This preventive approach cushions against potential reliability issues by ensuring that vulnerable stripes are assigned to the more error-tolerant SLC memory type, thereby maintaining device reliability while preserving overall storage capacity
3Reliability
If block stripes with high bad block quantities are designated as SLC memory, then device reliability increases, but storage capacity decreases due to lower density of SLC
Solution Approach 1:
The system optimizes the balance between reliability and storage capacity by dynamically changing the memory type parameter based on bad block quantity. Instead of fixed allocation, the system evaluates each block stripe's error characteristics and assigns SLC or QLC designation accordingly, ensuring that only necessary stripes are designated as SLC, thereby maintaining reliability while maximizing overall storage capacity
Solution Approach 2:
The patent applies local quality by designating specific block stripes as SLC memory based on their local bad block characteristics rather than uniformly designating all stripes. This localized approach ensures that only the minimum necessary capacity is allocated to SLC memory for reliability, while the remaining stripes maintain QLC designation for maximum storage efficiency, thereby optimizing the reliability-capacity trade-off
Data Source
AI summary
Various aspects of the present disclosure relate to a process for managing block stripe assignment based on block error conditions. A processing device may identify, for a plurality of block stripes associated with a memory device, respective quantities of blocks that are associated with an error condition. The processing device may designate a first block stripe of the plurality of block stripes as a single-level cell (SLC) block stripe based on a first quantity of blocks in the first block stripe that are associated with the error condition, and may designate a second block stripe of the plurality of block stripes as a quad-level cell (QLC) block stripe based on a second quantity of blocks in the second block stripe that are associated with the error condition, where the first quantity is greater than the second quantity.