Memory Read Strobe Feedback for Accurate Flash Bus Timing
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Solution Overview
Problem
There is a need for improved performance in communication between memory devices and controllers to maintain system performance as memory controller speed increases, particularly due to timing mismatches between read strobe signals and data arrival in flash memory systems.
Innovation Solution
Implementing read strobe feedback from the non-volatile memory device to the controller, where the RE* signal is fed back to provide a more accurate timing estimate of data arrival, synchronizing the data processing with the controller clock.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If memory controller speed increases to improve system performance, then productivity increases, but timing accuracy between read enable strobe signal and data arrival deteriorates due to propagation delays
Solution Approach 1:
The patent implements feedback by feeding back the read enable strobe signal (RE*) from the memory device to the controller. This feedback mechanism allows the controller to accurately determine when data is valid on the memory device, compensating for propagation delays and maintaining timing accuracy even at higher operating speeds.
Solution Approach 2:
The controller generates the read enable strobe signal (RE*-OUT) in advance and feeds it back to the memory device. This preliminary action allows the memory device to prepare data for transfer, and the feedback provides accurate timing information to the controller before data arrival, enabling synchronized high-speed operation.
2Measurement precision
If propagation delays are reduced to improve timing accuracy, then measurement precision improves, but device complexity increases due to additional feedback circuitry
Solution Approach 1:
The read enable strobe signal (RE*) serves multiple functions: it enables the memory device to output data, provides a feedback signal for timing synchronization, and allows the controller to determine data validity. This multi-functionality reduces the need for separate timing control circuits, minimizing additional complexity while improving timing accuracy.
3Speed
If data transfer speed increases to improve productivity, then memory speed improves, but reliability deteriorates due to timing mismatches between control signals and data arrival
Solution Approach 1:
The feedback of the read enable strobe signal provides the controller with accurate timing information about when data is valid on the memory device. This feedback mechanism ensures that the controller reads data at the correct time, preventing timing mismatches and ensuring reliable data transfer even at high speeds.
Solution Approach 2:
The system dynamically adjusts timing based on the feedback signal. The controller uses the fed back RE* signal to synchronize data reading operations with the actual data availability on the memory device, allowing the system to adapt to varying propagation delays and maintain reliability at different operating speeds.
Data Source
AI summary
A controller circuit is coupled to a memory device over a data/IO bus and a control bus. The controller circuit generates a read enable signal that is transmitted to the memory device to instruct the memory device to drive data onto the data/IO bus. The read enable signal is fed back to the controller circuit that then uses the fed back signal to read the data from the data/IO bus.