Nonvolatile Memory Sub-Block Refresh for Read Disturb Mitigation
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Solution Overview
Problem
Conventional NAND memory devices suffer from low bandwidth and high power consumption, making them unsuitable as a viable alternative to high bandwidth memory (HBM) devices, particularly in applications requiring high data access rates like large language models.
Innovation Solution
Implement a high bandwidth flash (HBF) package with a sub-block read refresh technique that divides memory cells into first and second sub-blocks, monitors read cycles, and reorders data to mitigate read disturb, optimizing for high bandwidth and low power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If conventional NAND memory devices are used, then cost is reduced compared to HBM, but bandwidth is too low and power consumption is too high
Solution Approach 1:
The memory block is divided into multiple sub-blocks (first sub-block and second sub-block) that can be independently managed. This segmentation allows the system to perform read refresh operations on specific sub-blocks without affecting the entire memory block, thereby reducing power consumption while maintaining high bandwidth performance through optimized data access patterns.
2Reliability
If read operations are performed repeatedly, then data access is maintained, but read disturb accumulates and degrades data integrity
Solution Approach 1:
The system performs read refresh operations periodically to prevent read disturb from accumulating. By proactively refreshing data before significant degradation occurs, the system maintains data integrity while allowing continuous high-speed read operations. The controller monitors read cycle counts and triggers refresh operations at appropriate intervals to preserve data reliability.
Solution Approach 2:
The controller tracks read cycle counts for each sub-block and uses this feedback information to determine when read refresh operations are necessary. This feedback mechanism allows the system to maintain data integrity by performing refresh operations based on actual usage patterns, thereby preserving reliability without unnecessarily reducing read access rates.
3Reliability
If data is relocated to prevent read disturb, then data integrity is protected, but additional write operations are required
Solution Approach 1:
By dividing the memory block into sub-blocks, the system can perform targeted data relocation and refresh operations only on affected sub-blocks rather than the entire block. This segmentation reduces the complexity of data management by localizing operations and minimizing the impact on overall system performance.
Data Source
AI summary
The memory device includes a memory block with an array of memory cells that are arranged in a plurality of word lines. The word lines are divided into a first sub-block and a second sub-block with the memory cells of the first sub-block containing data and with the memory cells of the second sub-block being erased. The memory device also includes circuitry that is configured to determine that the memory cells of the first sub-block have experienced significant read disturb. The circuitry is also configured to program the user data in the memory cells of the first sub-block into the memory cells of the second sub-block.