Nonvolatile Memory Sub-Block Segmentation for Error Management
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Solution Overview
Problem
The increasing storage capacity of nonvolatile memory devices poses challenges that do not align with existing memory management policies, leading to issues such as error occurrence and reduced endurance, which limits the lifetime of these devices.
Innovation Solution
A nonvolatile memory device is designed with a memory cell array where memory blocks are divided into bad and normal sub-blocks based on error occurrence frequency, allowing for different program/erase cycles and bias conditions to be applied to each sub-block, enhancing performance and extending the device's lifespan.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If storage capacity is increased in nonvolatile memory devices, then more data can be stored, but error occurrence frequency increases and endurance decreases
Solution Approach 1:
The memory block is divided into multiple sub-blocks, allowing independent management and operation of each sub-block. This segmentation enables the system to handle errors at the sub-block level rather than the entire block level, improving reliability while maintaining high storage capacity through selective operation of healthy sub-blocks.
Solution Approach 2:
Different program/erase cycle counts are applied to different sub-blocks based on their individual error occurrence frequencies. Sub-blocks with lower error rates receive higher program/erase cycle counts, while sub-blocks with higher error rates receive lower counts. This localized quality adjustment optimizes reliability without sacrificing overall storage capacity.
2Quantity of substance
If storage capacity is increased in nonvolatile memory devices, then more data can be stored, but device lifetime is reduced
Solution Approach 1:
The program/erase cycle count is dynamically adjusted for each sub-block based on real-time error occurrence frequency monitoring. This dynamic adaptation allows the system to extend device lifetime by reducing stress on deteriorating sub-blocks while maintaining full utilization of healthy sub-blocks, thereby preserving storage capacity over the extended lifetime.
Solution Approach 2:
The system continuously monitors error occurrence frequency in each sub-block and uses this feedback to adjust the program/erase cycle counts. This closed-loop feedback mechanism ensures that the memory device operates within reliable parameters, extending overall device lifetime while maintaining high storage capacity through intelligent resource allocation.
3Ease of operation
If uniform program/erase cycles are applied to all sub-blocks, then management is simplified, but performance is reduced due to error-prone sub-blocks
Solution Approach 1:
The program/erase cycle count parameter is changed individually for each sub-block based on measured error occurrence frequencies. This parameter differentiation allows the system to optimize performance by preventing operations on error-prone sub-blocks while maintaining simple management through automated monitoring and adjustment, eliminating the need for complex manual intervention.
Data Source
AI summary
Nonvolatile memory device includes a memory cell array and a control circuit. The memory cell array includes a plurality of memory blocks, the memory blocks including a plurality of memory cells coupled to word-lines respectively, the word-lines are stacked vertically on a substrate, and some memory cells of the plurality of memory cells are selected by sub-block unit smaller than one memory block. The control circuit divides sub-blocks of a first memory block into at least one bad sub-block and at least one normal sub-block based on error occurrence frequency of each of the sub-blocks, and applies different program/erase cycles to the at least one bad sub-block and the at least one normal sub-block based on a command and an address provided from external to the nonvolatile memory device. The at least one bad sub-block and the at least one normal sub-block are adjacent each other.