Memory Sub-System Asynchronous Power Loss Handling Logic

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Solution Overview

Problem

Conventional memory sub-systems face inefficiencies in handling asynchronous power loss (APL) due to complex margin read operations, which lead to processing delays, inaccurate determinations, and increased time-to-ready performance, especially with limited hardware controller capabilities.

Innovation Solution

The implementation of APL handling logic that detects and addresses power loss without margin read operations, moving potentially affected pages into a temporary area for rewriting and discarding unrecoverable data, thereby eliminating the need for margin read operations and reducing resource usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If margin read operations are performed to detect APL events, then data integrity can be verified, but processing delays increase and time-to-ready performance deteriorates

Engineering Contradiction:
Improvedata integrity verificationVSAvoidprocessing delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts the margin read operation from the APL detection process. Instead of performing margin reads to detect APL events, the system uses a simplified detection mechanism that identifies APL events through other means (such as monitoring power loss indicators or using error detection codes), thereby eliminating the time-consuming margin read step while still ensuring data integrity through alternative verification methods.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements preliminary actions by maintaining readiness structures in advance, such as pre-configured temporary storage areas and pre-established detection mechanisms. When an APL event occurs, the system can immediately respond using these pre-prepared resources without needing to perform time-consuming margin reads, thus reducing processing delay while maintaining reliability.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If margin read operations are performed to handle affected pages, then accurate page detection can be achieved, but device complexity and resource usage increase

Engineering Contradiction:
Improvepage detection accuracyVSAvoidcontroller complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent employs disposable temporary storage areas that are allocated temporarily during APL recovery and then discarded. Instead of using complex margin read operations, the system uses simple temporary page storage structures that can be quickly created and abandoned, reducing controller complexity while maintaining adequate page detection accuracy through alternative methods.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent changes the detection parameters from margin-based voltage readings to alternative indicators such as error detection codes or power loss flags. This parameter change simplifies the detection mechanism and reduces controller complexity while maintaining sufficient accuracy in identifying affected pages through different measurement approaches.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If conventional APL handling with margin reads is used, then thorough data verification is performed, but boot-up time and time-to-ready performance worsen

Engineering Contradiction:
Improvedata verification thoroughnessVSAvoidboot-up speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent implements a skipping mechanism where the system rushes through the APL recovery process by eliminating the margin read step. Instead of thoroughly verifying each page through margin reads, the system quickly identifies potentially affected pages through simpler detection and moves them to temporary storage for later verification, thereby accelerating boot-up time while maintaining data verification thoroughness through deferred checking.

Inventive Principle:
Principle #21Skipping (Rushing through)

Solution Approach 2:

The patent prepares recovery structures in advance, such as pre-allocated temporary storage areas and pre-configured recovery protocols. When an APL event occurs during boot-up, the system can immediately execute the pre-prepared recovery sequence without performing time-consuming margin reads, thus improving boot-up speed while maintaining thorough data verification through the pre-planned recovery process.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11914876B2Asynchronous power loss handling approach for a memory sub-system
Publication Date: 2024.02.27 MICRON TECHNOLOGY INC
  • US11914876B2 patent drawing
  • US11914876B2 patent drawing
  • US11914876B2 patent drawing

AI summary

The occurrence of an asynchronous power loss (APL) event is detected in a memory sub-system. In response, an APL handling operation is performed. The APL handing operation includes identifying a last written page at a first page location in a block of the memory device, wherein the last written page is associated with a memory cell of the memory device, copying data from the last written page and from a related page associated with the memory cell to a temporary storage area in the memory device, copying the data from the temporary storage area to a second page location in the block of the memory device, and providing a notification that the memory device has recovered from the APL event.