Memory Subarray Data Transfer via Shared Sensing Circuitry
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Solution Overview
Problem
Current memory devices face inefficiencies in data transfer between subarrays, leading to increased processing time and power consumption due to external communication requirements and the need for separate read and write operations.
Innovation Solution
The implementation of a memory device architecture where every other column of memory cells in each subarray is coupled to sensing circuitry stripes, allowing data transfer between subarrays through shared sensing circuitry, reducing the need for external communication by moving data within the memory array using adjacent subarrays and sensing circuitry stripes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data transfer between subarrays uses external communication, then reliability is maintained, but processing time increases and power consumption increases
Solution Approach 1:
The patent merges the sensing circuitry resources across multiple subarrays, allowing a single sensing circuitry stripe to serve adjacent subarrays. This consolidation enables direct internal data transfer between subarrays through shared sensing circuitry, eliminating the need for separate external read and write operations while maintaining data integrity through the established sensing and storage mechanisms.
Solution Approach 2:
The sensing circuitry is designed with multi-functionality to perform both data sensing from memory cells and data transfer between subarrays. The same sensing circuitry stripe can operate in different modes: sensing data from adjacent subarrays during transfer operations, and performing traditional read/write operations, thereby reducing external communication requirements while maintaining reliability.
2Reliability
If separate read and write operations are used for data transfer, then data integrity is maintained, but processing time increases
Solution Approach 1:
The patent combines separate read and write operations into a single integrated data transfer operation. By using shared sensing circuitry stripes that can simultaneously sense data from one subarray and transfer it to another, the system performs data movement in one operation rather than requiring sequential read-then-write operations, thereby improving productivity while maintaining data integrity through the reliable sensing mechanism.
3Productivity
If every other column is coupled to sensing circuitry stripes, then data transfer efficiency improves, but device complexity increases
Solution Approach 1:
The memory array is segmented into multiple subarrays with alternating column patterns coupled to shared sensing circuitry stripes. This segmentation allows efficient parallel data transfer operations across subarrays while using a regular, repeating pattern that simplifies the overall architecture. The segmented approach enables multiple data paths to operate simultaneously without requiring complex routing logic.
Solution Approach 2:
The sensing circuitry coupling pattern applies local quality by connecting every other column to sensing circuitry stripes in a consistent, localized manner. This regular local pattern throughout the array enables predictable and efficient data transfer performance while avoiding the need for complex global routing, thereby improving data transfer efficiency without proportionally increasing device complexity.
Data Source
AI summary
The present disclosure includes apparatuses and methods for data transfer between subarrays in memory. An example may include a first subarray of memory cells and a second subarray of memory cells, wherein a first portion of memory cells of the first subarray and a first portion of memory cells of the second subarray are coupled to a first sensing circuitry stripe. A third subarray of memory cells can include a first portion of memory cells coupled to a second sensing circuitry stripe. A second portion of memory cells of the second subarray and a second portion of memory cells of the third subarray can be coupled to a third sensing circuitry stripe. A particular row of the second array can include memory cells from the first portion of memory cells in the second array coupled to memory cells from the second portion of memory cells in the second array.