3D Memory Sub-Block Programming for Speed Uniformity
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Solution Overview
Problem
In 3D stacked non-volatile memory devices, variations in blocking oxide layer thickness due to distance from local interconnects lead to uneven programming speeds, increased programming time, and reduced performance, as thinner layers result in faster but less reliable programming.
Innovation Solution
The memory strings with relatively thin and thick blocking oxide layers are programmed separately, with SGD transistors connected differently in undivided and divided sub-blocks, allowing for optimized initial program voltage and reduced programming duration, resulting in uniform programming speed and improved reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If memory strings are programmed uniformly without subdivision, then device complexity is reduced, but programming speed uniformity deteriorates due to varying oxide layer thickness
Solution Approach 1:
The memory device divides a block of memory strings into multiple sub-blocks based on their spatial location and oxide layer thickness characteristics. Each sub-block is programmed independently with optimized parameters, resolving the contradiction by segmenting the uniform programming approach into location-specific programming operations.
Solution Approach 2:
Different programming parameters (voltage, pulse width, number of pulses) are applied to different sub-blocks according to their local oxide layer thickness characteristics. This local quality approach ensures that each region receives optimized programming conditions, achieving uniform programming speed across the entire block while maintaining manageable device complexity through systematic parameter differentiation.
2Productivity
If programming is performed on all memory strings simultaneously, then productivity is improved, but reliability deteriorates due to non-uniform programming speed
Solution Approach 1:
The memory block is segmented into sub-blocks that can be programmed in an organized sequence. This segmentation allows the system to maintain high productivity by processing multiple sub-blocks concurrently or in efficient succession, while ensuring reliability through parameter optimization for each sub-block's specific characteristics.
Solution Approach 2:
Programming parameters are dynamically changed based on the sub-block being programmed. By adjusting voltage levels, pulse durations, and programming sequences according to each sub-block's oxide layer thickness, the system achieves both high productivity through parallel processing capability and high reliability through location-optimized parameters.
3Duration of action of moving object
If initial program voltage is increased to speed up programming, then programming duration is reduced, but threshold voltage distribution widens reducing reliability
Solution Approach 1:
The initial program voltage is adjusted locally for each sub-block based on its oxide layer thickness. Sub-blocks with thinner oxide layers receive lower initial voltages, while those with thicker layers receive higher voltages. This local quality approach reduces programming duration for each region without causing excessive threshold voltage distribution widening, as each sub-block operates within its optimal voltage range.
Solution Approach 2:
The programming system implements dynamic parameter changes by adjusting the initial program voltage according to the specific sub-block being programmed. This parameter adaptation allows each sub-block to achieve fast programming without compromising threshold voltage distribution uniformity, as the voltage is optimized for each region's characteristics rather than using a single high voltage for all regions.
Data Source
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AI summary
A three-dimensional stacked memory device is configured to provide uniform programming speeds of different sets of memory strings formed in memory holes. In a process for removing sacrificial material from word line layers, a block oxide layer in the memory holes is etched away relatively more when the memory hole is relatively closer to an edge of the word line layers where an etchant is introduced. A thinner block oxide layer is associated with a faster programming speed. To compensate, memory strings at the edges of the word line layers are programmed together, separate from the programming of interior memory strings. A program operation can use a higher initial program voltage for programming the interior memory strings compared to the edge memory strings.