Nonvolatile Memory Sub-Block Segmentation for Lifespan Extension
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Solution Overview
Problem
The increasing storage capacity of nonvolatile memory devices poses challenges that do not align with existing memory management policies, leading to issues such as data errors and reduced lifespan due to varying threshold voltage distributions caused by factors like program elapsed time and temperature changes.
Innovation Solution
A nonvolatile memory device is designed with a memory block structure that includes multiple sub-blocks, where intermediate switching transistors are used to apply different program/erase cycles and bias conditions based on error occurrence frequency and endurance characteristics, allowing for selective treatment of bad and normal sub-blocks to enhance performance and extend device lifespan.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If storage capacity is increased, then memory device capability is improved, but data errors and lifespan reduction occur due to varying threshold voltage distributions
Solution Approach 1:
The memory block is divided into multiple sub-blocks (first sub-block, second sub-block, third sub-block) that can be independently managed. This segmentation allows different program/erase cycles to be applied to different sub-blocks based on their specific conditions, thereby maintaining data integrity while preserving increased storage capacity.
Solution Approach 2:
Different program/erase cycles are applied to different sub-blocks based on their threshold voltage distribution characteristics. The first sub-block receives a first program/erase cycle, the second sub-block receives a second program/erase cycle, and the third sub-block receives a third program/erase cycle, optimizing each region's performance and reliability locally.
2Quantity of substance
If storage capacity is increased, then memory device capability is improved, but device lifespan is reduced due to varying threshold voltage distributions
Solution Approach 1:
The memory block is divided into multiple sub-blocks that can be independently managed with different program/erase cycles. This allows the device to handle wear differently across sub-blocks, extending overall device lifespan while maintaining increased storage capacity.
Solution Approach 2:
The system dynamically selects different program/erase cycles based on the threshold voltage distribution characteristics of each sub-block. This dynamic adaptation allows the memory device to optimize its operation over time, extending lifespan while preserving storage capacity.
3Adaptability or versatility
If intermediate switching transistors are added to enable sub-block selection, then memory management flexibility is improved, but device complexity increases
Solution Approach 1:
Intermediate switching transistors are introduced as intermediary components between the control circuit and the memory cells. These transistors enable selective access to different sub-blocks (first sub-block, second sub-block, third sub-block) based on intermediate gate line signals, providing flexible memory management while maintaining a structured and manageable device architecture.
Data Source
AI summary
A nonvolatile memory device includes a memory cell region having a first metal pad and a peripheral circuit region having a second metal pad and vertically connected to the memory cell region by the first metal pad and the second metal pad, a a memory cell array in the memory cell region and an address decoder in the peripheral circuit region. The memory cell array includes memory blocks, and each memory block includes memory cells coupled to word-lines respectively. The word-lines are stacked vertically on a substrate, and some memory cells of the plurality of memory cells are selectable by a sub-block unit smaller than one memory block of the plurality of memory blocks. The address decoder applies an erase voltage to each of sub-blocks in a first memory block of the plurality of memory blocks through the first metal pad and the second metal pad.