Nonvolatile Memory Subpage Segmentation for Heat Crosstalk Mitigation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing nonvolatile memory devices face inefficiencies in writing and erasing data due to heat crosstalk and operational speed limitations in three-dimensional stacked memory cells, particularly in vertically oriented configurations.
Innovation Solution
The method involves dividing program or erase targets into subpages or subblocks, performing operations sequentially on these units, and conducting verification operations simultaneously across all units to optimize current distribution and prevent heat concentration, utilizing a channel structure with resistive films and channel layers for efficient data management in vertically stacked memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If data writing or erasing operations are performed on entire pages or blocks simultaneously in three-dimensional stacked memory cells, then operational speed is improved, but heat concentration occurs causing crosstalk and reduced reliability
Solution Approach 1:
The patent divides a page into multiple subpages and a block into multiple subblocks, then performs operations on these segmented units sequentially. This segmentation approach distributes the heat generation across multiple smaller operations rather than concentrating it in a single large operation, thereby maintaining operational speed while preventing heat crosstalk and improving reliability.
2Reliability
If operations are performed sequentially on smaller units to prevent heat concentration, then reliability is improved, but operational speed decreases
Solution Approach 1:
By segmenting pages into subpages and blocks into subblocks, the patent enables a balanced approach where sequential operation on smaller units prevents heat concentration while the reduced scope of each operation maintains acceptable speeds.
Solution Approach 2:
The patent employs periodic verification operations interspersed among the sequential program operations on different subpages. This periodic action structure allows the system to maintain progress through multiple operations while using verification points to ensure reliability, effectively managing the trade-off between speed and reliability.
3Measurement precision
If verification operations are performed after each program operation on subpages, then accuracy is improved, but time consumption increases
Solution Approach 1:
The patent implements periodic verification where verification operations are performed after program operations on different subpages rather than after every single subpage operation. This periodic approach maintains verification accuracy by checking results at regular intervals while reducing total time consumption by avoiding verification after every individual operation.
Solution Approach 2:
The patent maintains continuous progress through sequential program operations on multiple subpages, with verification operations inserted periodically rather than interrupting the flow after each operation. This continuity approach minimizes idle verification time while ensuring accuracy through regular checking points.
Data Source
AI summary
In a method of writing data in a nonvolatile memory device including a plurality of cell strings, each of the plurality of cell strings includes a plurality of memory cells disposed in a vertical direction. A program target page is divided into a plurality of subpages. The program target page is connected to one of a plurality of wordlines. Each of the plurality of subpages includes memory cells that are physically spaced apart from one another. A program operation is sequentially performed on the plurality of subpages. A program verification operation is performed on the program target page including the plurality of subpages at a time.