Semiconductor Memory Substrate Alignment Using Capacitive Marks

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Solution Overview

Problem

The process of coupling a memory cell array and a peripheral circuit in semiconductor memory devices often results in process failures due to misalignment, which affects the stability and accuracy of the manufacturing process.

Innovation Solution

A method is introduced that involves processing two substrates with align marks and sacrificial materials to ensure precise alignment and coupling of the memory cell array and peripheral circuit by measuring capacitance between the align marks, thereby improving alignment accuracy and stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional coupling methods are used to join memory cell array and peripheral circuit substrates, then the manufacturing process can be completed, but alignment errors occur causing process failures

Engineering Contradiction:
Improvealignment accuracyVSAvoidprocess failure rate
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent replaces mechanical alignment methods with electromagnetic field-based alignment. Capacitive sensors detect alignment status by measuring capacitance changes between sensor electrodes and reference electrodes, substituting physical mechanical alignment with an electromagnetic field measurement system that provides higher precision and reliability

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent implements a feedback mechanism where capacitive sensors continuously monitor alignment status during the coupling process. The measured capacitance values are compared against reference values, and alignment adjustments are made based on this feedback until the alignment error is within acceptable tolerances, ensuring high precision and reducing process failures

Inventive Principle:
Principle #23Feedback

2Measurement precision

If alignment marks are used to guide substrate coupling, then alignment can be achieved, but the coupling process remains unstable due to measurement inaccuracies

Engineering Contradiction:
Improvealignment measurement accuracyVSAvoidcoupling process stability
Core Design Contradiction:
Measurement precisionVSStability of the object's composition

Solution Approach 1:

The patent replaces visual or mechanical alignment mark detection with capacitive sensing. The capacitive sensors measure alignment status through electrical field interactions between sensor electrodes and reference electrodes on alignment marks, providing more precise and stable measurements compared to traditional optical or mechanical methods

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the measurement parameter from optical or mechanical detection to electrical capacitance measurement. By measuring capacitance changes as substrates approach each other, the system achieves higher measurement precision and stability, as capacitance measurements are more sensitive and repeatable than traditional alignment mark detection methods

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enhances the alignment accuracy and stability of the coupling process between the memory cell array and peripheral circuit, reducing process failures and improving the overall manufacturing efficiency of semiconductor memory devices.

Implementation Method 1

measuring capacitance between the first align mark and the second align mark

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS11996370B2Manufacturing method of a semiconductor memory device
Publication Date: 2024.05.28 SK HYNIX INC
  • US11996370B2 patent drawing
  • US11996370B2 patent drawing
  • US11996370B2 patent drawing

AI summary

A method of manufacturing a semiconductor memory device includes processing a first substrate including a first align mark and a first structure, processing a second substrate including a second align mark and a second structure, orientating the first substrate and the second substrate such that the first structure and the second structure face each other, and controlling alignment between the first structure and the second structure by using the first align mark and the second align mark to couple the first structure with the second structure.