Nonvolatile Memory Substrate Potential Control for Write Reliability
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Solution Overview
Problem
Nonvolatile semiconductor memories face a trade-off between write error and read disturb, where the small current difference between write and read currents leads to erroneous writing or read errors due to varying write characteristics across memory cells, as both currents are supplied through a common access transistor.
Innovation Solution
The implementation of a nonvolatile semiconductor memory with electrically-isolated substrate areas allows for independent setting of substrate potentials for access and non-access regions, adjusting the read and write currents to prevent errors and minimize leak currents, thereby ensuring accurate writing and reading.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the access transistor is designed to supply a write current that enables correct writing in a memory cell having the worst write characteristic, then the write reliability is improved, but the read current would exceed the write threshold value causing erroneous writing
Solution Approach 1:
The substrate is divided into multiple electrically-isolated substrate areas, allowing independent potential control for different regions. This segmentation enables the access transistor to supply different current levels to different substrate areas, preventing read disturb in cells with high sensitivity while maintaining write capability in cells with poor write characteristics.
Solution Approach 2:
Different substrate areas are assigned different substrate potentials tailored to their specific characteristics. Memory cells with poor write characteristics receive higher substrate potentials to facilitate writing, while memory cells with high read sensitivity receive lower substrate potentials to prevent read disturb, thus achieving local optimization of current characteristics.
2Object-generated harmful factors
If the access transistor is designed to supply a read current that prevents the read current from exceeding the write threshold value, then erroneous writing is prevented, but the write current would not exceed the write threshold value causing write error
Solution Approach 1:
The substrate is divided into multiple electrically-isolated substrate areas, allowing independent potential control for different regions. This segmentation enables the access transistor to supply different current levels to different substrate areas, preventing read disturb in cells with high sensitivity while maintaining write capability in cells with poor write characteristics.
Solution Approach 2:
Different substrate areas are assigned different substrate potentials tailored to their specific characteristics. Memory cells with poor write characteristics receive higher substrate potentials to facilitate writing, while memory cells with high read sensitivity receive lower substrate potentials to prevent read disturb, thus achieving local optimization of current characteristics.
3Device complexity
If a common substrate potential is applied to all substrate areas, then the device complexity is reduced, but the leak current cannot be sufficiently reduced due to varying characteristics across memory cells
Solution Approach 1:
The substrate is divided into multiple electrically-isolated substrate areas, each with independent potential control. This allows the application of different substrate potentials to different regions, enabling optimal leak current reduction for each memory cell group while maintaining manageable device complexity through modular potential control.
Data Source
AI summary
According to one embodiment, a nonvolatile semiconductor memory includes a semiconductor substrate, a first substrate area in the semiconductor substrate, a first cell unit in the first substrate area, the first cell unit including a first memory cell and a first transistor, and the first transistor having a control terminal connected to a first word line, using the first substrate area as a channel and supplying a read current or a write current to the first memory cell, and a substrate potential setting circuit setting the first substrate area to a first substrate potential when the read current is supplied to the first memory cell, and setting the first substrate area to a second substrate potential different from the first substrate potential when the write current is supplied to the first memory cell.