Memory Subsystem Augmenting Physical Memory with Low-Latency Backing Store

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Solution Overview

Problem

Conventional storage stacks relying on HDDs for virtual memory backing store introduce latency issues, which throttle the performance of modern applications requiring large amounts of physical memory access.

Innovation Solution

A memory subsystem is implemented to augment physical memory with a low-latency backing store, comprising high-speed serial links and control logic circuitry to manage data access between server nodes and a memory subsystem, enabling efficient data transfer and addressing between virtual and physical addresses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If HDD storage is used as a backing store for virtual memory, then cost is reduced and large capacity is provided, but access latency increases and application performance is throttled

Engineering Contradiction:
Improvestorage capacityVSAvoidaccess latency
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent segments the backing store into two distinct layers: a high-speed volatile memory layer (DRAM) for frequently accessed data and a large-capacity non-volatile storage layer (HDD or SSD) for less frequently accessed data. This segmentation allows the system to provide both large storage capacity and low access latency by directing different data access patterns to appropriate storage layers, thereby resolving the contradiction between capacity and speed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a memory controller and management system as an intermediary between the processor and the segmented storage layers. This intermediary intelligently manages data placement and retrieval, determining whether data should be fetched from the fast volatile memory or the large-capacity non-volatile storage, thereby mediating between the conflicting requirements of speed and capacity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If physical memory capacity is increased to meet application requirements, then application performance is improved, but system cost increases prohibitively

Engineering Contradiction:
Improveapplication performanceVSAvoidphysical memory capacity
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent implements a virtual memory system that creates a copy mechanism between physical memory and backing store. Instead of provisioning expensive physical memory for every possible data requirement, the system copies only the necessary data pages between the limited physical memory and the larger backing store, allowing applications to access large datasets without requiring proportionally large amounts of expensive physical memory.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent changes the parameters of the memory system by introducing a hybrid backing store with different speed and capacity characteristics. By adjusting the allocation between volatile and non-volatile storage components and dynamically managing data placement based on access patterns, the system optimizes the balance between performance and cost, allowing high-performance applications to run without prohibitively increasing physical memory capacity.

Inventive Principle:
Principle #35Parameter changes

3Quantity of substance

If virtual memory is implemented to compensate for physical memory shortage, then memory capacity is increased, but access latency increases due to secondary storage dependence

Engineering Contradiction:
Improvememory capacityVSAvoidaccess latency
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent segments the virtual memory backing store into a fast volatile memory segment and a large-capacity non-volatile storage segment. This segmentation allows the virtual memory system to provide both increased capacity and reduced latency by storing frequently accessed virtual memory pages in the fast volatile segment while maintaining large capacity in the non-volatile segment, thereby resolving the contradiction between capacity expansion and latency reduction.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements preliminary action by pre-fetching and caching data pages in the fast volatile memory before they are actually needed by the application. The memory controller monitors access patterns and proactively loads data from non-volatile storage to volatile memory in advance, reducing the latency experienced when applications need to access data that would otherwise require slower non-volatile storage access.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10241906B1Memory subsystem to augment physical memory of a computing system
Publication Date: 2019.03.26 EMC IP HLDG CO LLC
  • US10241906B1 patent drawing
  • US10241906B1 patent drawing
  • US10241906B1 patent drawing

AI summary

Systems and methods are provided for implementing a memory subsystem to augment physical memory of a computing system. For example, a system comprises a memory subsystem, and a computing system coupled to the memory subsystem. The computing system comprises a processor, a first memory module, and a second memory module. The first memory module comprises random access memory which is utilized by the processor to store data associated with an application executing on the computing system. The second memory module comprises control logic circuitry that is configured to control access to the memory subsystem on behalf of the processor to store and retrieve data associated with the application executing on the computing system.