Memory Subsystem Data Classification for Storage Optimization
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Solution Overview
Problem
Current storage devices using nonvolatile memory face performance degradation and increased costs due to the need for garbage collection, which involves waiting for reading/writing processes and requires additional memory, leading to a limited device life and higher costs.
Innovation Solution
The solution involves a configuration where a host issues identifiers for data erasable order and write commands to a memory subsystem, allowing data to be classified and written in simultaneous erase regions, eliminating the need for garbage collection and reducing the necessary capacity of nonvolatile memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If garbage collection is performed in a storage device using nonvolatile memory, then data management is maintained, but device performance deteriorates due to waiting for reading/writing processes
Solution Approach 1:
The patent applies preliminary action by classifying data into different groups based on erasability before writing to the nonvolatile memory. This pre-classification allows the system to organize data in a way that eliminates the need for subsequent garbage collection operations, thereby maintaining data management reliability while preventing performance deterioration.
2Reliability
If garbage collection is performed in a storage device using nonvolatile memory, then data management is maintained, but device life is deteriorated due to limited erase frequency
Solution Approach 1:
The patent applies preliminary action by classifying data into different groups based on erasability before writing to the nonvolatile memory. This pre-classification allows the system to organize data in a way that eliminates the need for subsequent garbage collection operations, thereby maintaining data management reliability while preventing performance deterioration.
3Reliability
If extra nonvolatile memory is added to perform garbage collection, then garbage collection capability is improved, but device cost increases
Solution Approach 1:
The patent applies the extraction principle by removing the need for extra nonvolatile memory components traditionally required for garbage collection. By classifying data into erasable and non-erasable groups and managing them differently, the system eliminates the requirement for additional memory capacity dedicated to garbage collection operations, thereby reducing device cost while maintaining garbage collection capability.
4Device complexity
If data is classified based on logical address or write order, then data organization is improved, but necessary data and unnecessary data are still mixed in the same block
Solution Approach 1:
The patent applies local quality by differentiating data management approaches based on the erasability characteristics of different data groups. Instead of uniform classification by logical address or write order, the system applies different quality attributes to different data blocks - specifically, identifying which blocks contain only erasable data versus mixed data - and manages them with appropriate strategies, thereby achieving effective data separation.
5Productivity
If data write target region size is increased to eliminate garbage collection, then garbage collection is eliminated, but nonvolatile memory capacity and cost increase
Solution Approach 1:
The patent applies parameter changes by modifying the data classification parameter from traditional methods (logical address, write order) to erasability-based classification. This parameter change enables the system to eliminate garbage collection without increasing memory capacity, as it identifies and manages erasable data groups that can be efficiently handled within the existing memory architecture.
Data Source
AI summary
An information processing device includes a host and a memory subsystem. The host issues an identifier indicating a data erasable order and a data write command to the memory subsystem and includes an information processing circuit for processing the data. The memory subsystem includes a first memory and a control circuit for writing the data in the first memory. The first memory has a data erase unit size larger than a data write unit size. The control circuit classifies the data based on the identifier, writes the data belonging to a first group in a first simultaneous erase region, in which data can be simultaneously erased, in the first memory, and writes the data belonging to a second group different from the first group in a second simultaneous erase region, in which data can be simultaneously erased, in the first memory. Consequently, the performance and the life of a storage device can be improved, and costs of the storage device can be reduced.