Memory Subsystem Power Loss Protection via SLC Flash Allocation
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Solution Overview
Problem
Existing memory sub-systems, such as SSDs, face challenges in data reliability due to asynchronous power loss, which can lead to data corruption or loss, as traditional solutions like backup power circuitry and NVDIMMs are costly and not always reliable.
Innovation Solution
A power loss protection component allocates a portion of the memory sub-system to non-volatile NAND flash memory, specifically single-level cell (SLC) NAND flash memory, by performing latency tests to rank flash blocks and selecting the fastest ones for data transfer during power loss events, reducing the need for backup power.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional backup power circuitry or NVDIMMs are used, then data reliability during power loss is improved, but device cost increases
Solution Approach 1:
The patent extracts the power loss protection function from dedicated backup power circuitry or NVDIMM components and implements it using a portion of the existing NAND flash memory capacity. By allocating a specific region of the flash memory for power loss protection purposes, the system achieves data protection without adding separate hardware components, thereby reducing device cost while maintaining reliability.
Solution Approach 2:
The patent makes the NAND flash memory serve multiple functions: it acts as both the primary storage medium for user data and as a backup power loss protection mechanism. By using the same flash memory blocks for dual purposes (through dynamic allocation between cache and protection regions), the system eliminates the need for dedicated backup components, reducing overall device complexity and cost.
2Reliability
If faster data transfer during power loss events is implemented, then data loss is reduced, but energy consumption increases
Solution Approach 1:
The patent performs preliminary actions by continuously monitoring write operations and identifying data that needs protection before power loss occurs. The system pre-allocates protection regions in the flash memory and maintains readiness to transfer data, so that when power loss is detected, the transfer can begin immediately without delay, reducing data loss while managing energy consumption through selective rather than continuous operation.
Solution Approach 2:
The patent implements rapid data transfer by bypassing normal write procedures and using direct memory-to-flash copying when power loss is detected. The system rushes through the critical data protection phase by utilizing high-speed transfer paths and prioritizing essential data movement over non-critical operations, thereby minimizing data loss during the brief power loss window while controlling overall energy consumption.
Data Source
AI summary
Aspects of the present disclosure provide systems and methods for improved power loss protection in a memory sub-system of a device. In particular, a power loss protection component allocates a portion of the memory sub-system to non-volatile memory. Responsive to detecting a trigger event at the device, wherein the trigger event may include asynchronous power loss of the device, the power loss protection component detects data written to a volatile cache of the memory sub-system, retrieves the data from the volatile cache, and writes the data to the portion of the memory sub-system allocated to the non-volatile memory.