Memory Subsystem Stripe Operations for Redundancy Metadata Recovery

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Solution Overview

Problem

Existing memory sub-systems that do not support stripe-based operations face challenges in generating and updating redundancy metadata for fault tolerant stripes, leading to potential data unrecoverability in case of catastrophic memory failure.

Innovation Solution

Enabling stripe-based operations for error recovery by determining a set of memory access operations associated with a stripe-based command, such as a read-modify-write operation, and executing these operations to update redundancy metadata for fault tolerant stripes as host data is programmed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory sub-systems do not support stripe-based operations, then device complexity is reduced, but reliability deteriorates due to inability to update redundancy metadata for fault tolerant stripes

Engineering Contradiction:
Improvedata protection against catastrophic memory failuresVSAvoidstripe-based operation support
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory sub-system divides data into stripes across multiple memory devices, with each stripe having its own redundancy metadata. This segmentation allows independent error recovery for each stripe without requiring system-wide operations, enabling stripe-based error recovery while managing complexity through modular organization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system pre-establishes fault tolerant stripes with redundancy metadata before catastrophic failures occur. By preparing the stripe structure and redundancy information in advance, the system can quickly execute read-modify-write operations during failure recovery without needing complex real-time decisions.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If stripe-based read-modify-write operations are enabled for updating redundancy metadata, then reliability improves, but loss of time increases due to additional memory access operations

Engineering Contradiction:
Improvefault tolerant stripe error recoveryVSAvoidtime for redundancy metadata updates
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent combines multiple memory access operations into a single stripe-based read-modify-write sequence. Instead of updating redundancy metadata for each individual memory device separately, the system performs a single operation that updates all devices in a stripe simultaneously, reducing total time while maintaining reliability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The stripe-based operation maintains continuous useful action by processing multiple memory devices in sequence within a single operation. The read-modify-write sequence continues without interruption across all devices in the stripe, ensuring that redundancy metadata is updated efficiently without idle time between operations.

Inventive Principle:
Principle #20Continuity of useful action

3Productivity

If stripe-based operations are implemented, then productivity improves through efficient error recovery, but device complexity increases due to additional control logic

Engineering Contradiction:
Improveerror recovery efficiencyVSAvoidstripe-based operation control
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory sub-system controller implements stripe-based operations as a universal mechanism that handles multiple functions: normal data access, redundancy metadata updates, and error recovery. By making the stripe operation framework multi-functional, the system avoids adding separate specialized logic for each function, thereby limiting the increase in device complexity while maintaining high productivity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12346574B2Enabling stripe-based operations for error recovery at a memory sub-system
Publication Date: 2025.07.01 MICRON TECHNOLOGY INC
  • US12346574B2 patent drawing
  • US12346574B2 patent drawing
  • US12346574B2 patent drawing

AI summary

A stripe-based command pertaining to a set of host data items at management units (MUs) of a memory sub-system configured to support non-stripe based commands is received. A set of operations to be executed at the MUs based on the stripe-based command is determined. The set of operations include one or more first operations associated with the set of host data items, the one or more first operations having a first type, and one or more second operations associated with the set of host data items, the one or more second operations having a second type. A first set of commands corresponding to the one or more first operations and a second set of commands corresponding to the one or more second operations is executed.