Semiconductor Memory Fabrication with Support Patterns
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Solution Overview
Problem
The reliability of dynamic random access memory (DRAM) devices is compromised due to the increased height of cell capacitors, which can lead to leaning and malfunction, and existing fabrication methods face challenges in maintaining process margins and avoiding voids and electrical shorts during the formation of support patterns and electrodes.
Innovation Solution
A method of fabricating semiconductor memory devices involving the formation of hard mask patterns and support patterns using a damascene technique, where protrusions from the lower mold layer are utilized to increase process margins and prevent voids and electrical shorts, with the support pattern formed after the hard mask patterns are removed, and electrodes are formed subsequently to minimize contamination and damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the height of cell capacitors is increased, then the storage capacity is improved, but the reliability deteriorates due to leaning and malfunction
Solution Approach 1:
The support pattern is formed in advance before the electrode is fabricated. This preliminary formation of the support structure provides mechanical reinforcement to the cell capacitor, preventing leaning and malfunction that would otherwise occur with increased capacitor height. The support pattern acts as a preventive measure established before the problematic electrode formation step.
2Ease of manufacture
If the support pattern is formed using conventional methods, then the fabrication process is simple, but voids and electrical shorts occur reducing reliability
Solution Approach 1:
The fabrication process is segmented into distinct sequential steps: first forming the support pattern, then removing the hard mask, and finally forming the electrode. This segmentation allows each step to be optimized independently, ensuring the support pattern is properly formed without voids before electrode formation, thereby preventing electrical shorts while maintaining overall process simplicity.
Solution Approach 2:
The support pattern is formed preliminarily before electrode formation. This preliminary action ensures that the support structure is in place to prevent voids and electrical shorts during subsequent electrode fabrication, improving reliability without significantly complicating the overall manufacturing process.
3Object-affected harmful factors
If the hard mask pattern is removed before forming the support pattern, then contamination and damage to the electrode are minimized, but the process complexity increases
Solution Approach 1:
The process is segmented into distinct sequential steps with the hard mask removal occurring after support pattern formation but before electrode formation. This segmentation isolates the hard mask removal step from both the support pattern formation and electrode fabrication, minimizing contamination and damage while organizing the process into manageable stages that don't significantly increase overall complexity.
Solution Approach 2:
The support pattern is formed in advance before hard mask removal and electrode formation. This preliminary formation of the support structure provides a protective framework that minimizes contamination and damage during subsequent steps, while the sequential organization maintains reasonable process complexity.
Data Source
AI summary
A method of fabricating a semiconductor memory device includes forming a hard mask pattern using a damascene method on a lower mold layer stacked on a substrate and etching the lower mold layer using the hard mask pattern as an etch mask to define a protrusion under the hard mask pattern. A support pattern is formed on a top surface of the etched lower mold layer, the top surface of the etched lower mold layer being located at a lower level than a top surface of the protrusion. A lower electrode supported by the support pattern is formed.