Semiconductor Memory Switches for Current Path Control
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Solution Overview
Problem
Phase change memory devices face high voltage levels during write and read operations, leading to excessive current consumption and reliability issues due to uneven current distribution across multiple current paths, which affects data integrity and performance.
Innovation Solution
A semiconductor memory device with a switch control unit that selectively activates switches to create a single current path during write operations, using a driver to supply a constant voltage and reduce the load on the write driver, thereby stabilizing current supply and improving voltage distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If voltage from a write driver is increased to increase current supply force, then current supply capability is improved, but reliability of data is deteriorated because a distribution of resistance values is widened due to the resistance of current paths
Solution Approach 1:
The patent divides the bit line into multiple segments by introducing switching elements that can selectively activate different portions of the bit line. This segmentation allows current to be supplied only to the specific memory cell being accessed, rather than activating the entire bit line, thereby reducing overall current consumption and preventing excessive voltage drops that would widen resistance distribution and compromise data reliability.
2Ease of operation
If a word line WL or a bit line BL is activated within a plurality of cell matrices, then write or read operation is enabled, but a load on a line is increased with the result that a lot of current is consumed
Solution Approach 1:
The patent introduces dynamically controllable switching elements on bit lines that can be selectively turned on or off based on the specific memory cell being accessed. This dynamic control allows the system to activate only the necessary portion of the bit line for the current operation, rather than maintaining a static activated state across the entire bit line, thereby reducing current consumption while preserving full operational capability.
3Adaptability or versatility
If there is a plurality of current paths, then current can flow to multiple memory cells, but a normal write operation may not be performed because an electric current is not regularly divided according to circumstances
Solution Approach 1:
The patent introduces switching elements as intermediary components between the write driver and the memory cells. These switches act as mediators that selectively control current flow through different bit line segments, ensuring that current is properly directed and divided only to the intended memory cell. This intermediary control mechanism prevents unwanted current distribution while maintaining the ability to access multiple memory cells through controlled activation of specific switch states.
Data Source
AI summary
A semiconductor memory device includes a plurality of first memory cells included in a first memory cell group and coupled to a plurality of first bit lines, respectively, a plurality of first switches coupled to the first bit lines, respectively, and coupled to a voltage node, a driver configured to supply a constant voltage to the voltage node for a write operation, and a switch control unit configured to selectively turn on one or more of the first switches when the write operation is performed.


