Nonvolatile Memory Switching Elements Stabilize Current
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Solution Overview
Problem
Existing nonvolatile storage devices face challenges in supplying sufficient current and managing fluctuations when causing electrical breakdown simultaneously in multiple memory cells, leading to unstable write characteristics and potential electrical breakdown issues.
Innovation Solution
The device incorporates a memory cell array with switching elements that allow simultaneous connection of multiple signal lines to a power supply, along with a memory controller to manage different voltage levels for writing and reading, ensuring stable current supply and controlled electrical breakdown.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If simultaneous breakdown is caused in a plurality of memory cells arranged in multiple columns, then writing speed is improved, but current supply amount becomes insufficient and fluctuations increase
Solution Approach 1:
The bit line is divided into multiple independent signal lines (first signal lines and second signal lines), with each line having its own switching element connected to the power supply. This segmentation allows current to be supplied through multiple parallel paths, preventing insufficient current supply and reducing fluctuations when performing simultaneous breakdown in multiple memory cells.
2Productivity
If simultaneous breakdown is caused in a plurality of memory cells arranged in multiple columns, then writing efficiency is improved, but current fluctuations increase
Solution Approach 1:
The power supply connection is segmented into multiple independent switching elements, each controlling a separate signal line. This allows the current to be distributed and controlled independently for each line, stabilizing the overall current supply while enabling simultaneous breakdown operations across multiple columns.
Solution Approach 2:
The switching elements can independently adjust the voltage and current parameters for each signal line, allowing optimization of current supply characteristics to maintain stability during simultaneous breakdown operations while preserving high writing efficiency.
3Productivity
If high voltage is supplied to cause electrical breakdown, then data writing is achieved, but unnecessary electrical breakdown may occur without proper control
Solution Approach 1:
The switching elements are configured to be turned on in advance before the breakdown voltage is applied to the memory cells. This preliminary action ensures that the current path is properly established and controlled, allowing high voltage to be supplied safely to cause the desired electrical breakdown without causing unnecessary breakdown in other cells.
Solution Approach 2:
The control circuit monitors the state of switching elements and coordinates their operation with the voltage application timing. This feedback mechanism ensures that switching elements are in the appropriate connected or disconnected state at the right moments, preventing unnecessary electrical breakdown while enabling effective data writing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach stabilizes current flow and reduces fluctuations, enabling simultaneous writing and reading operations across multiple memory cells without causing unnecessary electrical breakdown, thus enhancing the reliability and efficiency of data storage.
Implementation Method 1
A voltage of several volts is applied to a thin insulating film in the storage element included in the memory cell, to cause electrical breakdown
Data Source
AI summary
The present disclosure provides a nonvolatile storage device and a nonvolatile storage system capable of reducing at least either the current supply amount or the fluctuations when breakdown is to be caused simultaneously in a plurality of memory cells.The nonvolatile storage device includes: a memory cell array including a plurality of first signal lines, a plurality of second signal lines intersecting the plurality of first signal lines, and a plurality of memory cells disposed at intersection portions between the plurality of first signal lines and the plurality of second signal lines; and a plurality of switching elements that put ends of the respective first signal lines of the plurality of first signal lines and a power supply into either a connected state or a disconnected state, in which two or more switching elements among the plurality of switching elements can be in the connected state simultaneously at a time of writing into the memory cell.


