Memory Synchronization Domains for Parallel Processing
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Solution Overview
Problem
Existing thread synchronization methods in parallel processing compute architectures, such as the use of MEMBAR instructions, can force unnecessary synchronization of threads across memory synchronization domains, leading to inefficiencies and performance reductions.
Innovation Solution
A computer-implemented method for synchronizing threads that determines when a first thread has executed a memory barrier instruction and identifies the memory apertures accessed by threads within a specific domain. It generates a memory barrier command that only references the accessed memory apertures within that domain, excluding other domains, and transmits this command to the relevant memory apertures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a MEMBAR.SYS instruction is executed to synchronize threads at system scope, then all memory references from all threads become visible to other clients, but unrelated threads are forced to synchronize unnecessarily causing performance degradation
Solution Approach 1:
The patent segments the memory synchronization process by introducing memory synchronization domains that partition threads into distinct groups. Each domain maintains its own synchronization state and memory aperture references, allowing selective synchronization within domains rather than forcing system-wide synchronization for all threads. This segmentation enables thread D to remain in a different domain and avoid unnecessary synchronization when thread B executes MEMBAR.SYS.
Solution Approach 2:
The patent applies local quality by making synchronization behavior domain-specific rather than uniform across all threads. Each memory synchronization domain has its own characteristics regarding which memory apertures are accessed and which threads are involved. This allows the system to tailor synchronization operations to the specific needs of each domain, synchronizing only the relevant memory apertures for threads in the same domain rather than forcing all threads to synchronize at system scope.
2Reliability
If threads synchronize at system scope when any thread executes MEMBAR.SYS, then transitive synchronization is achieved across all threads, but unnecessary synchronization of unrelated threads increases interference and slows down memory traffic
Solution Approach 1:
The patent divides threads into separate memory synchronization domains, which segments the transitive synchronization process. Instead of requiring all threads to synchronize simultaneously at system scope, threads within the same domain can synchronize independently through their domain's memory apertures. This segmentation reduces the total synchronization time by parallelizing the process across multiple domains while still achieving transitive synchronization where needed.
Solution Approach 2:
The patent applies partial action by synchronizing only the memory apertures that are actually accessed by threads within a specific domain, rather than synchronizing all memory apertures across all threads. This selective synchronization approach reduces unnecessary synchronization overhead and time loss while maintaining the necessary transitive synchronization properties for threads that do interact through shared memory apertures.
3Reliability
If the GPU conservatively flushes all memory references at system scope, then all threads are synchronized, but memory traffic interference increases and performance decreases
Solution Approach 1:
The patent implements local quality by making memory aperture references domain-specific. Each memory synchronization domain tracks which memory apertures its threads access and generates MEMBAR commands that reference only those specific apertures. This eliminates unnecessary memory traffic to apertures that are not accessed by threads in the same domain, reducing interconnect bandwidth consumption while maintaining correct memory visibility for relevant threads.
Solution Approach 2:
The patent extracts the unnecessary synchronization operations by removing references to memory apertures that are not accessed by threads in the current domain. When generating a MEMBAR command, the system extracts and includes only the memory aperture references that are actually needed for threads in the same domain, eliminating redundant synchronization traffic to other apertures and reducing overall interconnect bandwidth usage.
Data Source
AI summary
Various embodiments include a parallel processing computer system that provides multiple memory synchronization domains in a single parallel processor to reduce unneeded synchronization operations. During execution, one execution kernel may synchronize with one or more other execution kernels by processing outstanding memory references. The parallel processor tracks memory references for each domain to each portion of local and remote memory. During synchronization, the processor synchronizes the memory references for a specific domain while refraining from synchronizing memory references for other domains. As a result, synchronization operations between kernels complete in a reduced amount of time relative to prior approaches.