Memory System Address Translation and Encryption
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Solution Overview
Problem
Existing solid state drive (SSD) systems face inefficiencies due to redundant address translation tables in both the host and the SSD, leading to increased memory usage and degraded I/O performance. Additionally, the application-level garbage collection on the host increases the amount of data written to the SSD, degrading storage performance and shortening the SSD's lifespan.
Innovation Solution
The proposed solution involves sharing the role of the flash translation layer (FTL) between the host and the SSD. The host handles block-level operations, while the SSD determines the physical storage location within a block. This configuration employs different addressing methods for write and read operations, allowing the SSD to encrypt data with both an encryption key and an address for enhanced security.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If redundant address translation tables are maintained in both host and SSD, then data translation capability is provided, but memory usage increases and I/O performance degrades
Solution Approach 1:
The patent extracts and removes the redundant address translation table from the host side, keeping only the essential LBA-to-physical address translation in the SSD. This eliminates the duplicate table structure that caused increased memory usage while maintaining the necessary data translation functionality through the SSD's translation layer.
Solution Approach 2:
The SSD's address translation table is designed to serve multiple functions: it handles both the translation of host LBA addresses to physical addresses and provides encryption key management. This multi-functional approach eliminates the need for separate translation tables in the host, reducing overall system memory requirements.
2Ease of operation
If application-level garbage collection is performed on the host, then data management is achieved, but the amount of data written to SSD increases, degrading storage performance
Solution Approach 1:
The patent extracts the garbage collection function from the host and relocates it to the SSD level. The SSD performs its own garbage collection using internal control circuits, which eliminates the need for the host to write large amounts of data to the SSD for garbage collection operations, thereby improving storage performance.
Solution Approach 2:
The SSD is designed to perform garbage collection autonomously using its internal control circuits and management tables. This self-service capability allows the SSD to manage its own data without requiring extensive host intervention, reducing the write amplification effect and maintaining high storage performance.
3Productivity
If FTL role is shared between host and SSD, then address translation efficiency is improved, but encryption key management complexity increases
Solution Approach 1:
The patent implements a multi-functional approach where the SSD's address translation table simultaneously handles physical address translation and encryption key storage. This integration allows the system to achieve efficient address translation while managing encryption keys within the same structure, avoiding the need for separate complex key management systems.
Solution Approach 2:
The patent introduces an encryption key management table as an intermediary structure within the SSD. This table serves as a mediator between the address translation function and the encryption function, allowing efficient key retrieval during translation operations without adding significant complexity to the overall system.
Data Source
AI summary
According to one embodiment, a memory system includes a nonvolatile memory and a controller. In response to receiving from a host a write request designating a first address for identifying data to be written, the controller encrypts the data with the first address and a first encryption key, and writes the encrypted data to the nonvolatile memory together with the first address. In response to receiving from the host a read request designating a physical address indicative of a physical storage location of the nonvolatile memory, the controller reads both the encrypted data and the first address from the nonvolatile memory on the basis of the physical address, and decrypts the read encrypted data with the first encryption key and the read first address.