Memory System Data Transfer to Host for Power Reduction

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Solution Overview

Problem

Memory systems with volatile processing information face inefficiencies in reduced power modes due to the need for frequent refresh operations, which increase power consumption and limit their performance during idle or standby modes.

Innovation Solution

The system transfers processing information from a volatile memory array in the memory system to a host system before entering reduced power modes, eliminating the need for refresh operations and reducing power consumption by maintaining this information at the host system until the memory system resumes active operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If volatile memory is used to store processing information in a memory system, then fast access and low latency are achieved, but frequent refresh operations are required which increase power consumption during reduced power modes

Engineering Contradiction:
Improveaccess speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent extracts the processing information from the volatile memory array before the memory system enters reduced power mode and transfers it to the host system. This removal of data from the volatile storage eliminates the need for refresh operations during low-power states, resolving the contradiction between fast access requirements and power consumption constraints.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs preliminary action by transferring processing information from volatile to non-volatile storage (host system) before the memory system transitions to reduced power mode. This advance preparation ensures that when the system wakes up, the information is already preserved externally, avoiding the need for continuous refresh operations and reducing overall power consumption.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If refresh operations are performed on volatile memory during reduced power modes, then data integrity is maintained, but performance and energy efficiency are limited

Engineering Contradiction:
Improvedata integrityVSAvoidperformance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts processing information from the volatile memory array before entering reduced power mode and stores it in the host system's non-volatile memory. This extraction maintains data integrity during low-power states without requiring continuous refresh operations, thereby improving performance and energy efficiency while preserving reliability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The host system acts as an intermediary, receiving and storing processing information from the memory system before it enters reduced power mode. This intermediary storage mechanism preserves data integrity externally, allowing the memory system to operate in low-power modes without performance degradation or energy waste from refresh operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Loss of time

If processing information is maintained in volatile memory during reduced power modes, then quick resumption is possible, but continuous power consumption occurs due to refresh requirements

Engineering Contradiction:
Improveresumption timeVSAvoidenergy efficiency
Core Design Contradiction:
Loss of timeVSLoss of energy

Solution Approach 1:

The patent extracts processing information from volatile memory and transfers it to the host system before the memory system enters reduced power mode. This extraction eliminates the need for continuous refresh operations, significantly reducing energy loss during idle periods while enabling quick resumption by simply transferring the data back when needed.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the storage parameter of processing information from volatile (in-memory) to non-volatile (host system storage) during reduced power modes. This parameter change reduces energy consumption by eliminating refresh requirements while maintaining the capability for quick resumption through efficient data transfer protocols.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11720261B2Transferring memory system data to a host system
Publication Date: 2023.08.08 MICRON TECHNOLOGY INC
  • US11720261B2 patent drawing
  • US11720261B2 patent drawing
  • US11720261B2 patent drawing

AI summary

Methods, systems, and devices for transferring memory system data to a host system are described. A system may be configured for transferring information between a memory system and a host system in response to transitions between various operating modes, such as operating modes associated with different operating power levels. For example, before entering a reduced power mode, the memory system may identify information stored in a volatile memory array and transmit the identified information to the host system. Such information transmitted to the host system may be returned to the memory system to support memory system operation after exiting the reduced power mode. In some examples, such information exchanged between the memory system and the host system may be associated with a processing capability of the memory system, and the described operations may be referred to as suspending memory system processing information to a host system.