Memory System Low-Latency Read Recovery Decoding
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Solution Overview
Problem
Solid State Drives (SSDs) experience high latencies during read/write workloads, which hinder their performance compared to hard-disk drives, especially due to redundant decoding operations in existing Read Recovery Level (RRL) features.
Innovation Solution
Implementing a low-latency RRL scheme that avoids redundant decoding by setting the first decoder to a second recovery level with a maximum iteration number and the second decoder to the first recovery level for part of the time during data decoding, allowing data to be decoded once to fulfill multiple recovery modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the existing Read Recovery Level (RRL) feature is implemented with multiple decoding operations, then error recovery capability is improved, but latency increases due to redundant decoding
Solution Approach 1:
The patent applies preliminary action by pre-configuring the decoder with a maximum iteration number and setting it to a second recovery level when a read command is received. This preliminary setup allows the decoder to be ready to operate at the second recovery level immediately after a set time elapses, without requiring redundant decoding operations. The decoder is pre-prepared to switch between recovery levels efficiently, reducing latency while maintaining error recovery capability.
2Reliability
If multiple decoders are used to handle different recovery levels simultaneously, then error recovery capability is improved, but device complexity increases
Solution Approach 1:
The patent applies universality by enabling a single decoder to perform multiple functions - it can operate at different recovery levels (first and second recovery levels) and handle multiple iteration numbers. The decoder is configured to be versatile, switching between different recovery levels as needed, eliminating the need for separate dedicated decoders for each recovery level. This multi-functional approach maintains error recovery capability while reducing device complexity.
Data Source
AI summary
Multiple memory systems with respective decoders employ a low latency implementation of a read recovery level feature in decoding data. The decoding comprises receiving from a host a read request for decoding read data at a first recovery level by a first memory system, a first decoder of the first memory system being set at a second recovery level with a corresponding maximum iteration number when the read request is received by the first memory system; and operating the first decoder, after a set time elapses, to decode the read data at the second recovery level. A second decoder of a second memory system is set at the first recovery level for at least part of the time during which the first decoder operates to decode the read data at the second recovery level.