Memory System Dual Encoding for Power Reduction

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Solution Overview

Problem

Current memory systems face challenges in reducing power consumption and improving data transmission quality between controllers and nonvolatile memories, particularly in NAND-type flash memory systems where data randomization and bit value distributions affect communication efficiency.

Innovation Solution

The memory system employs a dual encoding process involving a first DBI encoder and an advanced DBI encoder to transform data, ensuring that the number of '1' bits is minimized in transmitted data, thereby reducing power consumption and enhancing communication quality by biasing bit values and using selectors to optimize data line assignments based on communication quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If data is transmitted without encoding optimization, then transmission speed is maintained, but power consumption increases and communication quality deteriorates

Engineering Contradiction:
Improvepower consumptionVSAvoidencoding process complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing DBI encoding before data transmission to optimize the bit distribution in advance. The encoder counts the number of '1' bits in the input data and conditionally inverts bits to achieve a target distribution (e.g., reducing '1' bits to 30% or less). This preprocessing step ensures that subsequent transmissions consume less power and experience less interference, resolving the contradiction between power consumption and transmission efficiency.

Inventive Principle:
Principle #10Preliminary action

2Use of energy by moving object

If bit values are biased to reduce '1' bits, then power consumption decreases, but data transmission complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoiddata transmission simplicity
Core Design Contradiction:
Use of energy by moving objectVSEase of operation

Solution Approach 1:

The patent applies parameter changes by modifying the bit distribution parameters through DBI encoding. Specifically, it changes the proportion of '1' bits in the transmitted data from a random distribution (50%) to an optimized distribution (30% or less). This parameter optimization reduces power consumption during transmission while maintaining data integrity through reversible encoding operations.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If advanced DBI encoding is applied, then communication quality improves, but device complexity increases

Engineering Contradiction:
Improvecommunication qualityVSAvoidencoder complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the encoding process into distinct functional modules: a '1' bit counting unit that counts the number of '1' bits in input data, a determination unit that decides whether inversion is needed based on the count, and an inversion unit that performs the actual bit inversion. This modular segmentation improves communication quality through systematic DBI encoding while making the overall device complexity manageable through clear functional separation.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12008247B2Memory system
Publication Date: 2024.06.11 KIOXIA CORP
  • US12008247B2 patent drawing
  • US12008247B2 patent drawing
  • US12008247B2 patent drawing

AI summary

A memory system includes a nonvolatile memory and a controller that includes an encoder configured to encode a first group of data including a plurality of first data, each first data having a plurality of bits. The encoder is configured to perform a first encoding process of generating a second group of data including a plurality of second data from the plurality of first data in the first group, and a second encoding process of generating a third group of data including a plurality of third data from the plurality of second data in the second group. A logical value of “1” is less likely to be the value in an n-th bit position of the plurality of third data in the third group than the value in any of the bit positions of the plurality of second data in the second group.