Memory System Dual-Output Interface Mode Switching

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Solution Overview

Problem

Existing memory systems face challenges in efficiently managing communication interfaces, particularly in sharing a pair of transmitting and receiving ports for low-speed serial communication, which can lead to signal mixing and reduced output drivability, increasing costs and complexity during manufacturing and operation.

Innovation Solution

The memory system incorporates a dual-output interface structure within the controller, where the first output interface supports three voltage levels (High, Low, and High-Z) and the second output interface supports two voltage levels (High and Low), with distinct resistive connections to ensure appropriate signal transmission and reception, allowing for mode switching between normal and test modes without hardware refinement.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a single transmitting port is shared between first and second output interfaces, then the number of ports is reduced, but signal mixing occurs and output drivability is reduced

Engineering Contradiction:
Improvenumber of portsVSAvoidsignal transmission quality
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent implements dynamic switching between normal mode and test mode through mode control unit 330. In normal mode, first output interface 301 transmits signals with high drivability for standard operations. In test mode, second output interface 302 takes over with optimized drivability for testing. This dynamic allocation allows a single transmitting port 141 to serve multiple functions without signal mixing, resolving the contradiction between port reduction and signal quality.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The mode control unit 330 preliminarily determines the operational mode (normal or test) before signal transmission begins. By pre-configuring which output interface should be active based on the operational state, the system prevents signal mixing from the outset. The determining unit 321 and mode control unit 330 work together to establish the correct transmission path before data flows through transmitting port 141, ensuring signal integrity while maintaining port efficiency.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If drivability is optimized for normal mode, then communication efficiency improves, but test mode operations become difficult

Engineering Contradiction:
Improvecommunication efficiencyVSAvoidmode switching capability
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The system dynamically adjusts drivability characteristics based on operational mode. The mode control unit 330 switches between first output interface 301 (optimized for normal mode communication efficiency) and second output interface 302 (optimized for test mode operations). This dynamic reconfiguration allows the transmitting port 141 to adapt its drivability characteristics to match the current operational requirements, simultaneously achieving high communication efficiency in normal mode and effective test operations in test mode.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the drivability parameter of the output interface based on operational mode. In normal mode, the first output interface 301 provides high drivability for efficient data transmission. In test mode, the mode control unit 330 switches to the second output interface 302 with different drivability characteristics suitable for testing. This parameter change approach allows the system to optimize communication efficiency when needed while maintaining adaptability for different operational scenarios through mode switching.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If separate transmitting ports are provided for first and second output interfaces, then signal transmission quality is maintained, but manufacturing costs increase

Engineering Contradiction:
Improvesignal transmission qualityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent merges the functionality of two separate transmitting ports into a single transmitting port 141 by implementing mode-based switching. The mode control unit 330 controls which output interface (first 301 or second 302) connects to the shared transmitting port 141 based on operational mode. This merging approach maintains signal transmission quality through proper mode management while reducing the number of physical ports required, thereby lowering manufacturing costs for the connector 13 and overall system assembly.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The transmitting port 141 is designed as a universal interface that can serve both normal mode operations (through first output interface 301) and test mode operations (through second output interface 302). The mode control unit 330 enables this multi-functionality by routing signals from the appropriate output interface to the shared transmitting port 141. This universal design eliminates the need for separate dedicated ports for each function, reducing manufacturing complexity and cost while maintaining reliable signal transmission through proper mode-based signal routing.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9460813B2Memory system
Publication Date: 2016.10.04 KIOXIA CORP
  • US9460813B2 patent drawing
  • US9460813B2 patent drawing
  • US9460813B2 patent drawing

AI summary

According to one embodiment, there is provided a memory system that is connected to a host apparatus. The memory system includes a transmitting port and a controller. The transmitting port transmits a transmission signal to the host apparatus. The controller includes a first output interface that is connected to the transmitting port and a second output interface that is connected to the transmitting port. The memory system is configured such that a drivability of an output from the first output interface is larger than a drivability of an output from the second output interface in a first mode.