Memory System Efficiency Mode Sub-Channel Bandwidth Control

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Solution Overview

Problem

Existing memory systems face challenges in balancing power efficiency with high-performance data access, particularly in mobile devices where battery life is a concern.

Innovation Solution

The implementation of a memory system with dynamically adjustable bandwidth through sub-channels, allowing for operation in low-power modes while maintaining quick access to data as needed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the memory system operates in high-power mode to provide quicker data access, then the data access speed is improved, but the power consumption increases

Engineering Contradiction:
Improvedata access speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The memory system dynamically adjusts its operating mode based on real-time performance requirements. The host device can switch between high-power mode (with multiple sub-channels active) and low-power mode (with fewer sub-channels active), allowing the system to adapt its power consumption and performance characteristics to match current workload demands

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes operational parameters by enabling or disabling specific sub-channels. By modifying the number of active sub-channels, the system adjusts its bandwidth and power consumption characteristics. This parameter change allows flexible trade-offs between performance and power efficiency without requiring hardware reconfiguration

Inventive Principle:
Principle #35Parameter changes

2Productivity

If multiple sub-channels are enabled for high bandwidth operation, then the data throughput is improved, but the device complexity increases

Engineering Contradiction:
Improvedata throughputVSAvoidmemory system complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory system is segmented into multiple independent sub-channels, each capable of operating autonomously. This segmentation allows the system to provide high throughput when needed by activating multiple channels while reducing complexity by deactivating channels when lower throughput suffices. Each sub-channel can be independently controlled, simplifying the management of overall system complexity

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250068574A1Efficiency mode in a memory system
Publication Date: 2025.02.27 QUALCOMM INC
  • US20250068574A1 patent drawing
  • US20250068574A1 patent drawing
  • US20250068574A1 patent drawing

AI summary

This disclosure provides systems, methods, and devices for memory systems that support an efficient mode for reducing power consumption in a memory module while maintaining access to all contents of memory. In a first aspect, a method includes communicating, by a memory module, first data stored in a first plurality of banks to a host device through a first sub-channel in a first operating mode; communicating second data stored in the second plurality of banks to the host device through a second sub-channel in the first operating mode; receiving a command to enter a second operating mode; and communicating third data stored in the first plurality of banks and fourth data stored in the second plurality of banks to the host device through the first sub-channel in the second operating mode. Other aspects and features are also claimed and described.