Memory System With Position-Based Error Correction Code Distribution
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Solution Overview
Problem
Current memory systems face challenges in efficiently managing data write and read operations using the last-in first-out method, particularly in nonvolatile memories like magnetic domain wall memory, where data shifting and error correction codes distribution are not optimally addressed, leading to potential data loss and errors.
Innovation Solution
A memory system comprising a nonvolatile memory with layers functioning as shift registers and a controller that adds error correction codes, adjusts code amounts based on page positions, and manages data shifting to optimize write and read operations, ensuring efficient data storage and retrieval while minimizing errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is written to all layers uniformly with the same error correction code amount, then the manufacturing process is simple, but data loss and errors increase in layers that require more error correction
Solution Approach 1:
The patent applies local quality by distributing different amounts of error correction codes to different layers based on their specific requirements. The controller determines the code amount for each layer individually, allowing layers with higher error susceptibility to receive more error correction resources while maintaining overall system reliability.
2Reliability
If data shifting is performed without optimizing code distribution, then the operation is simple, but data loss increases during shift operations
Solution Approach 1:
The patent applies preliminary action by distributing error correction codes to data before the shifting operation occurs. The controller adds appropriate error correction codes to each layer's data in advance, so that when data shifting is performed, the codes are already in place to protect against potential data loss during the shift operation.
3Reliability
If uniform error correction is applied to all pages, then the processing is straightforward, but pages at different positions experience different error rates
Solution Approach 1:
The patent applies local quality by tailoring the error correction code amount to each page's specific position and error susceptibility. Pages at different positions within a layer receive different code amounts based on their individual error rates, ensuring optimal protection for each page rather than applying a uniform standard.
Data Source
AI summary
According to one embodiment, a memory system includes a nonvolatile memory and a controller. The nonvolatile memory includes a plurality of blocks each including a plurality of layers functioning as a plurality of stages of a shift register, and performs write and read of data by a last-in first-out method. The layers of each block are logically partitioned into a plurality of pages each including a set of adjacent layers. The controller writes a plurality of data portions to which error correction codes are added, to a write destination block. The controller changes a code amount of an error correction code added to a first data portion to be written, on the basis of a position of a page in the write destination block to which the first data portion is to be written.