Memory System Message Queue Pointer Monitoring
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Solution Overview
Problem
Current memory systems experience performance degradation and increased power consumption due to unnecessary CPU operations, as they require frequent notifications and confirmations when messages are queued, leading to inefficient processing and resource overload.
Innovation Solution
A memory system with a message queue, first and second pointers, and a monitor unit that notifies the CPU only when the pointers indicate the same address, allowing for efficient message processing by incrementing the first pointer based on required messages and reducing CPU load and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the CPU continuously monitors and processes every queued message, then message processing completeness is improved, but CPU load and power consumption increase
Solution Approach 1:
The system performs preliminary action by pre-calculating and storing the required number of messages (N) that the CPU needs to process. The monitor unit uses this pre-stored information to determine when to notify the CPU, eliminating the need for continuous monitoring and reducing CPU power consumption while ensuring complete message processing.
Solution Approach 2:
The system implements feedback through the monitor unit that continuously checks the message queue status and compares it with the required number of messages. When the queue contains the required number of messages, the monitor unit sends a notification to the CPU, creating an efficient feedback loop that reduces CPU load while maintaining processing completeness.
2Measurement precision
If the CPU processes messages one by one with frequent notifications, then processing accuracy is improved, but processing time increases
Solution Approach 1:
The system performs preliminary action by pre-determining the exact number of messages (N) the CPU requires and storing this information. The monitor unit uses this pre-planned information to accurately determine when the CPU should be notified, ensuring processing accuracy while minimizing unnecessary notifications and reducing overall processing time.
Solution Approach 2:
The monitor unit performs self-service by autonomously monitoring the message queue, counting the number of queued messages, and comparing it with the required number. This self-service capability eliminates the need for continuous CPU intervention, maintaining processing accuracy while significantly reducing processing time.
3Device complexity
If the system uses a simple message queue without pointer monitoring, then device complexity is reduced, but CPU operations become inefficient
Solution Approach 1:
The system applies segmentation by dividing the message queue management into distinct functional components: the message queue itself, the monitor unit that tracks queue status, and the CPU that processes messages. This segmentation allows each component to have a simple structure while working together to improve CPU processing efficiency through coordinated operation.
Solution Approach 2:
The monitor unit serves as an intermediary between the message queue and the CPU. It mediates the interaction by monitoring the queue status, counting messages, and notifying the CPU only when the required number of messages are available. This intermediary role simplifies the overall system architecture while significantly improving CPU processing efficiency.
Data Source
AI summary
According to one embodiment, a memory system includes a first memory including a message queue having first to nth addresses (n≥2, n is natural number), a first pointer showing one of the first to nth addresses, and a second pointer showing one of the first to nth addresses, a monitor unit which detects whether the first and second pointers show the first address, and a processing unit which changes an address shown by the first pointer from the first address to an ith address (n≥i≥2, i is natural number) when the first and second pointers show the first address. An address shown by the second pointer is incremented from the first address to a (j+1)th address (j≥1, j is natural number) when first to jth messages are queued in the first to jth addresses.