Memory System Power Supply Circuit Switching for Data Retention

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Solution Overview

Problem

Memory systems with volatile DRAM face data loss when power is cut off from an external supply, especially in low power consumption modes, as existing solutions either consume high power for data copying or stress the NAND memory.

Innovation Solution

Incorporating a non-volatile internal power supply, such as a capacitor or supercapacitor, and a controller that switches power sources to maintain DRAM functionality during power outages, allowing continuous data storage without high power consumption or NAND memory stress.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is copied from volatile memory to non-volatile memory when power is cut off, then data loss is prevented, but power consumption increases and NAND memory is stressed

Engineering Contradiction:
Improvedata retentionVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies preliminary action by copying data from volatile DRAM to non-volatile NAND memory before power is actually cut off. The controller detects power failure conditions in advance and initiates the data copying process while power is still available, ensuring data is safely transferred to persistent storage before the power interruption occurs.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements beforehand cushioning by providing an external power supply that activates when main power fails. This backup power source cushions the system against power interruptions, maintaining operation long enough to complete data copying from DRAM to NAND memory, thereby preventing data loss without requiring high continuous power consumption.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Reliability

If data is continuously copied to non-volatile memory, then data loss is prevented, but NAND memory lifespan is reduced due to stress

Engineering Contradiction:
Improvedata retentionVSAvoidNAND memory lifespan
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent applies partial action by copying only the necessary data from DRAM to NAND memory when power failure is detected, rather than continuously copying all data. The controller selectively transfers data that needs preservation, reducing the total number of write operations to NAND memory and thereby extending its lifespan while still preventing data loss.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The system implements self-service by automatically detecting power failure conditions and initiating data copying without external intervention. The controller monitors power status and autonomously manages the data protection process, copying only when necessary, which minimizes unnecessary wear on NAND memory while ensuring data retention.

Inventive Principle:
Principle #25Self-service

3Speed

If volatile memory is used for data storage, then fast access is achieved, but data is lost when power is cut off

Engineering Contradiction:
Improvedata access speedVSAvoiddata retention
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent merges volatile DRAM and non-volatile NAND memory into a hybrid storage system. The DRAM provides fast data access for active operations, while the NAND memory provides persistent storage for data protection. The controller manages both memory types together, copying data between them as needed, thereby combining the speed advantages of volatile memory with the reliability of non-volatile memory.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The controller acts as an intermediary between DRAM and NAND memory, managing data transfer between the two memory types. When power failure is detected, the controller mediates the data copying process from DRAM to NAND, ensuring that the speed benefits of volatile memory are maintained during normal operation while the reliability benefits of non-volatile memory are activated when needed.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Prevents data loss in DRAM by switching to internal power sources during power outages, reducing power consumption and extending NAND memory lifespan by avoiding stressful data copying processes.

Implementation Method 1

In response to detection that supply of power from the external power supply to the volatile memory is interrupted, the switching device switches the power supply circuit so that power is supplied from the capacitor to the volatile memory

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

Incorporating a non-volatile internal power supply, such as a capacitor or supercapacitor

Methodology Applied
Scientific EffectElectrical Accumulator: Electrical Accumulator

Data Source

PatentUS10656692B2Memory system
Publication Date: 2020.05.19 KIOXIA CORP
  • US10656692B2 patent drawing
  • US10656692B2 patent drawing
  • US10656692B2 patent drawing

AI summary

According to one embodiment, a memory system includes a volatile memory, a power supply circuit, and a controller. The power supply circuit includes a first power supply path in which power supplied from a host device is supplied to the volatile memory, a second power supply path in which the power is supplied from the internal power supply to the volatile memory, and a switching device that switches between the first power supply path and the second power supply path. In response to an instruction for a transition to a low power consumption mode received from the host device, the controller outputs, to the switching device, an instruction to switch the power supply circuit from the first power supply path to the second power supply path.