Memory System Rebuild Using Sequentiality Metadata Encoding

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Solution Overview

Problem

Existing memory systems face challenges in efficiently rebuilding address mappings after an asynchronous power loss, particularly in sequential write modes, due to high overhead in storing checkpoints and accessing metadata for each physical address.

Innovation Solution

The memory system stores metadata indicating whether data stored at physical addresses is sequential, allowing for algorithmic rebuilding of the address mapping during a rebuild operation without accessing metadata for each physical address, thus reducing resource consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the memory system stores checkpoints and metadata for each physical address to enable address mapping rebuild, then the reliability of the memory system is improved, but the device complexity and overhead increase

Engineering Contradiction:
Improveaddress mapping rebuild reliabilityVSAvoidcheckpoint and metadata overhead
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts only the essential information needed for rebuild operations - specifically sequentiality indicators and run-length encoding data - rather than storing complete metadata for every physical address. This selective extraction reduces the overhead while maintaining rebuild capability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of storing detailed metadata for each address and then processing it during rebuild, the patent inverts the approach by storing compressed sequentiality indicators that allow the system to algorithmically reconstruct address mappings without accessing individual metadata entries during rebuild operations.

Inventive Principle:
Principle #13The other way round (Inversion)

2Measurement precision

If the memory system accesses metadata for each physical address during rebuild operations, then the measurement precision of address mappings is improved, but the computation time and power usage increase

Engineering Contradiction:
Improveaddress mapping accuracyVSAvoidrebuild computation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent performs preliminary encoding of sequentiality indicators and run-length data during normal write operations, so that during rebuild operations the system can directly use these pre-computed values without performing complex metadata access and processing for each address.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the representation parameters of address mapping data by using run-length encoding and sequentiality indicators instead of storing complete metadata structures, which reduces the computational complexity of rebuild operations while maintaining address mapping accuracy.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the memory system stores complete metadata for each physical address, then the reliability of data recovery is improved, but the use of energy during read and write operations increases

Engineering Contradiction:
Improvedata recovery reliabilityVSAvoidenergy consumption during write operations
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts only the critical sequentiality information needed for data recovery rather than storing complete metadata, reducing the energy required to write and read metadata while maintaining the ability to recover data mappings after power loss.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS12346582B2Techniques for memory system rebuild
Publication Date: 2025.07.01 MICRON TECHNOLOGY INC
  • US12346582B2 patent drawing
  • US12346582B2 patent drawing
  • US12346582B2 patent drawing

AI summary

Methods, systems, and devices for techniques for memory system rebuild are described. In some cases, a memory system may store an indication of whether data stored to one or more physical addresses is sequential using metadata associated with the one or more physical addresses. For metadata corresponding to a beginning physical address, the memory system may store an indication of a quantity of physical addresses subsequent to the beginning physical address with sequential corresponding logical addresses. Additionally or alternatively, the memory system may store an indication of a quantity of physical addresses preceding a last physical address with sequential corresponding logical addresses. During a rebuild operation, the memory system may read the stored indication and may rebuild an address mapping algorithmically using the stored indication.