Semiconductor Memory Target Refresh via Controller-Device Address Sampling

The address counting function is segmented between the memory controller and memory device. The memory controller performs initial address sampling and provides target addresses to the memory device, which then executes the refresh operations. This division reduces the complexity of counting circuits within the memory device while maintaining accurate target word line selection.

The memory controller acts as an intermediary that performs address sampling and provides processed target addresses to the memory device. This intermediary role reduces the burden on the memory device's counting circuits while ensuring accurate identification of word lines needing refresh, thus resolving the contradiction between precision and complexity.

Instead of performing refresh operations uniformly across all word lines, the system applies target refresh operations only to specific word lines identified as having high activation counts or susceptible to row hammering. This localized approach maintains data retention reliability for at-risk word lines while reducing unnecessary refresh operations on other word lines, thereby minimizing time and energy consumption.

The memory controller performs preliminary address sampling and identifies target word lines before the memory device executes refresh operations. This preliminary action allows the memory device to perform refresh operations more efficiently by having pre-identified targets, reducing the time and energy required for each refresh operation while maintaining high reliability.

The address counting and sampling functionality is extracted from the memory device and transferred to the memory controller. The memory controller performs the counting and sampling operations externally, providing only the necessary target addresses to the memory device. This extraction significantly reduces the area occupied by counting circuits within the memory device while maintaining accurate target word line identification.

The memory controller serves as an intermediary that performs the area-intensive counting and sampling operations externally. This intermediary approach allows the memory device to maintain high accuracy in target address selection without requiring large counting circuits within its own architecture, thus resolving the contradiction between precision and area.