Memory Controller Terminal Layout for Low-Skew Multi-Channel I/O

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Solution Overview

Problem

Memory systems experience signal skew and interference between signals during data input/output operations, which can increase implementation costs.

Innovation Solution

The memory system and controller are designed with adjacent data input/output terminals for different channels, ensuring that package terminals corresponding to specific bits of each channel are also adjacent, thereby preventing signal skew and interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If data input/output terminals for different channels are arranged non-adjacently, then signal interference is reduced, but signal skew increases and implementation cost increases

Engineering Contradiction:
Improvesignal interferenceVSAvoidsignal skew
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The patent segments the data input/output terminals into different groups corresponding to different channels (first data input/output terminal group for first channel, second data input/output terminal group for second channel). By segmenting terminals into channel-specific groups and arranging corresponding bits adjacently within each group, the patent simultaneously reduces signal interference through proper grouping and minimizes signal skew through adjacent positioning of corresponding bits.

Inventive Principle:
Principle #1Segmentation

2Reliability

If data input/output terminals for different channels are arranged adjacently, then signal skew is reduced, but signal interference increases and implementation cost increases

Engineering Contradiction:
Improvesignal skewVSAvoidsignal interference
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by making specific portions of the terminal arrangement have different properties: terminals corresponding to the same bit position across different channels are arranged adjacently (for skew reduction), while terminals for different channels are organized into distinct groups (for interference reduction). This localized differentiation in arrangement strategy resolves the contradiction between reducing skew and preventing interference.

Inventive Principle:
Principle #3Local quality

3Reliability

If complex terminal arrangement strategies are used to prevent signal skew and interference, then signal quality improves, but implementation cost increases

Engineering Contradiction:
Improvesignal qualityVSAvoidimplementation cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent uses a systematic copying approach where the arrangement pattern for data terminals is replicated across different channels with consistent indexing. Each channel's terminals are arranged following the same pattern (K terminals per group, corresponding bits adjacent), which simplifies manufacturing by providing a repeatable, standardized arrangement strategy rather than requiring complex custom layouts for each channel.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS12388446B2Memory system and memory controller
Publication Date: 2025.08.12 SK HYNIX INC
  • US12388446B2 patent drawing
  • US12388446B2 patent drawing
  • US12388446B2 patent drawing

AI summary

Embodiments of the present disclosure relate to a memory system and a memory controller, in which data input/output terminals in different data input/output terminal groups corresponding to different channels may be arranged adjacent to each other, thereby preventing skew of a signal occurring during data input/output operations and interference between different signals and reducing the cost required for implementing the memory system.