Memory Test Circuit for Abnormal Data-Reading Diagnosis
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Solution Overview
Problem
Current multi-chip module packaging technologies for memory devices limit the ability to measure waveforms, and focus ion beam (FIB) technology has limitations in retrieving signals, making it difficult to diagnose abnormal data-reading issues in memory modules without using probes or FIB.
Innovation Solution
A memory test method and device that includes a memory controller and module, where data-writing and reading are performed under burst mode, with timing calibration of the data-strobe enable signal to adjust sampling, allowing for data-reading without probes or FIB, and identifying configuration issues in the memory controller and module.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-chip module packaging technology is used to dispose two or more than two dies within a package, then the memory device can achieve higher integration and capacity, but the waveforms of the memory device cannot be measured by using probes
Solution Approach 1:
The patent introduces a test circuit as an intermediary component that includes a data strobe enable unit, data strobe gate control unit, and sampling unit. This test circuit mediates between the memory dies and the external testing equipment, enabling waveform measurement without requiring direct probe access to the packaged dies. The test circuit captures and outputs test signals that can be measured externally while maintaining the multi-chip module structure.
2Difficulty of detecting and measuring
If focus ion beam (FIB) technology is used to retrieve signals, then signal retrieval is possible from packaged memory devices, but the number of signals observed each time is limited and not every signal can be retrieved
Solution Approach 1:
The patent implements a self-service testing mechanism where the memory device itself performs the testing function through integrated test circuits. The data strobe enable unit and sampling unit work together to automatically capture and output test signals without requiring external FIB intervention. This allows multiple signals to be observed simultaneously through the dedicated test circuit outputs, eliminating the limitation of FIB's one-at-a-time signal retrieval.
3Measurement precision
If timing calibration is performed on data-strobe enable signal to adjust sampling, then data-reading accuracy is improved, but additional signal processing steps are required
Solution Approach 1:
The patent merges the timing calibration function directly into the data strobe gate control unit, which is already part of the test circuit structure. The data strobe enable unit and data strobe gate control unit work as an integrated system to simultaneously perform signal enabling, timing calibration, and sampling control. This combined approach achieves precise data-reading without requiring separate, independent calibration equipment or processes.
Data Source
AI summary
A memory test method is provided that includes the steps outlined below. The memory controller performs data-writing and data-reading on a memory module. When a quantity of read data is incorrect, a data-strobe enable signal is calibrated to perform data reading. When there is one of less than one piece of negative edge data reading content, a sampling unit is triggered. When the quantity of read data increases, the condition that the data-strobe signal is not received is determined. When the quantity does not increase, the memory controller is inspected. When there is more than one piece of read data, the burst mode setting of the memory module is inspected. When the quantity is correct and the content is not correct, a transmission circuit setting and the sampling unit are inspected. When the quantity and the content are correct, the test flow is terminated.