Memory Test Apparatus Defective Column Selection

The patent applies preliminary action by maintaining a failure information table that is updated in real-time during the testing process. Instead of writing all failure information to memory and then reading it back for analysis, the analysis data is prepared incrementally as tests are performed. This allows the memory repairing analysis to be conducted with accurate failure data while significantly reducing the time required, as the information is already organized and ready for analysis without requiring a separate read operation.

The patent implements continuity of useful action by enabling parallel operations during the testing process. While the testing section continues to test memory blocks and update the failure information table, the selecting section can simultaneously perform memory repairing analysis using the data already available in the table. This eliminates idle time and allows multiple operations to proceed concurrently, improving overall test process efficiency while maintaining complete and accurate failure analysis.

The patent addresses the issue of increasing test time with larger memory capacities by implementing preliminary action through the failure information table. As memory blocks are tested, failure information is immediately recorded and organized in the table, allowing analysis to begin incrementally rather than waiting for complete memory testing. This approach enables the test apparatus to handle larger capacity flash memories efficiently, as the analysis process can proceed with available data without requiring proportional increases in total test time.