Semiconductor Memory Device Test Mode Pad Reuse

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Solution Overview

Problem

Synchronous memory devices require a data strobe signal (DQS) for write and read operations during wafer tests, which decreases test efficiency and increases fabrication costs due to the need for additional test parameters and pads.

Innovation Solution

A semiconductor memory device design that allows for testing without a DQS signal, using a write control circuit for writing data based on a write strobe signal during normal operations and a read control circuit for generating and providing a read strobe signal during test operations, enabling test write and read operations without the DQS pad.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a DQS pad is used for testing write or read operations of synchronous memory device, then the memory device can be properly tested, but test efficiency is lowered and fabrication cost for probe card increases

Engineering Contradiction:
Improvetesting capabilityVSAvoidtest efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent makes the data I/O pad serve dual functions: it acts as a data pad during normal operations and as a strobe pad during test operations. This is achieved through a test mode signal that switches the function of the pad, eliminating the need for a separate DQS pad while maintaining full testing capability for write and read operations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent changes the functional parameter of the data I/O pad based on the test mode signal. When the test mode signal is activated, the pad's function transitions from data transmission to strobe signal transmission, allowing the same physical pad to serve different purposes under different operating conditions.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a DQS pad is used for testing synchronous memory device, then proper testing can be performed, but the number of pads required increases leading to higher fabrication cost

Engineering Contradiction:
Improvetesting capabilityVSAvoidfabrication cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent makes the data I/O pad serve dual functions: it acts as a data pad during normal operations and as a strobe pad during test operations. This is achieved through a test mode signal that switches the function of the pad, eliminating the need for a separate DQS pad while maintaining full testing capability for write and read operations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent extracts the strobe signal function from a dedicated DQS pad and integrates it into the existing data I/O pad structure. By removing the requirement for a separate strobe pad and reusing the data pad for both purposes, the overall pad count is reduced, lowering probe card fabrication costs.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If a DQS pad is used for testing synchronous memory device, then write and read operations can be tested, but the number of test parameters increases

Engineering Contradiction:
Improvetesting capabilityVSAvoidtest parameters
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent makes the data I/O pad serve dual functions: it acts as a data pad during normal operations and as a strobe pad during test operations. This is achieved through a test mode signal that switches the function of the pad, eliminating the need for a separate DQS pad while maintaining full testing capability for write and read operations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10891994B2Semiconductor memory device for inputting and outputting data based on data strobe signal and operating method thereof
Publication Date: 2021.01.12 SK HYNIX INC
  • US10891994B2 patent drawing
  • US10891994B2 patent drawing
  • US10891994B2 patent drawing

AI summary

A semiconductor memory device includes: an internal circuit; a write control circuit suitable for writing write data into the internal circuit based on a write strobe signal during a normal write operation, and writing test data into the internal circuit based on a read strobe signal during a test write operation; and a read control circuit suitable for generating the read strobe signal and outputting the read strobe signal together with read data read from the internal circuit during a normal read operation or a test read operation, and generating the read strobe signal and providing the write control circuit with the read strobe signal during the test write operation.