Semiconductor Memory Test Repair Controller
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Solution Overview
Problem
There is a need for a semiconductor device capable of performing test and repair operations on semiconductor memory devices even after they are mounted in a system, as errors can occur post-fabrication due to reduced device sizes.
Innovation Solution
A semiconductor device with a storage unit for program codes controlled by a processor core, including a first control unit to manage semiconductor memory devices, allowing for test and repair operations by analyzing and executing program codes stored in a specific data structure based on control and main protocols.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If semiconductor memory devices are tested only during fabrication, then manufacturing process is simple, but errors occurring after mounting cannot be detected
Solution Approach 1:
The semiconductor device integrates multiple functions including normal memory operations, test operations, and repair operations within a single device architecture. The controller can execute different program codes to perform various functions, making the device universal and eliminating the need for separate external test equipment.
Solution Approach 2:
The semiconductor device performs self-testing and self-diagnosis by executing test program codes stored in its own memory. The device monitors its own operations, detects errors in memory cells, and can perform repair operations autonomously without requiring external test equipment, thereby achieving self-service capability.
2Quantity of substance
If device size is reduced, then integration density increases, but error rate increases
Solution Approach 1:
The device performs preliminary error detection by continuously monitoring memory cell operations during normal use. When potential errors are detected, the system activates repair operations before the errors cause system failure, thereby maintaining reliability despite reduced device size and higher integration density.
Solution Approach 2:
The semiconductor device implements feedback mechanisms where test results from memory cell operations are continuously monitored and fed back to the controller. Based on this feedback, the system can identify erroneous cells, activate repair operations, and adjust operations to avoid affected cells, thereby maintaining reliability in highly integrated devices.
3Reliability
If test operations are performed after mounting, then system reliability improves, but additional control mechanisms are required
Solution Approach 1:
The controller is designed with universal functionality to handle both normal memory control operations and test/repair operations. By using a single multi-functional controller rather than separate dedicated test equipment, the system achieves improved reliability while minimizing the increase in control mechanism complexity.
Solution Approach 2:
The patent merges the test control functions and repair control functions with the normal memory control functions into a single integrated controller. This consolidation eliminates the need for separate external test equipment and reduces overall system complexity while enabling post-mounting test and repair operations.
Data Source
AI summary
A semiconductor device may include: a storage unit configured to store program codes provided through control of a processor core; and a control unit configured to perform a control operation on a semiconductor memory device according to the program codes.